In the past decade, extracellular vesicles (EVs) have been recognized as potent vehicles of intercellular communication, both in prokaryotes and eukaryotes. This is due to their capacity to transfer proteins, lipids and nucleic acids, thereby influencing various physiological and pathological functions of both recipient and parent cells. While intensive investigation has targeted the role of EVs in different pathological processes, for example, in cancer and autoimmune diseases, the EV-mediated maintenance of homeostasis and the regulation of physiological functions have remained less explored. Here, we provide a comprehensive overview of the current understanding of the physiological roles of EVs, which has been written by crowd-sourcing, drawing on the unique EV expertise of academia-based scientists, clinicians and industry based in 27 European countries, the United States and Australia. This review is intended to be of relevance to both researchers already working on EV biology and to newcomers who will encounter this universal cell biological system. Therefore, here we address the molecular contents and functions of EVs in various tissues and body fluids from cell systems to organs. We also review the physiological mechanisms of EVs in bacteria, lower eukaryotes and plants to highlight the functional uniformity of this emerging communication system.

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Biological properties of extracellular vesicles and their physiological functions

Within the past decade, extracellular vesicles have emerged as important mediators of intercellular communication, being involved in the transmission of biological signals between cells in both prokaryotes and higher eukaryotes to regulate a diverse range of biological processes. In addition, pathophysiological roles for extracellular vesicles are beginning to be recognized in diseases including cancer, infectious diseases and neurodegenerative disorders, highlighting potential novel targets for therapeutic intervention. Moreover, both unmodified and engineered extracellular vesicles are likely to have applications in macromolecular drug delivery. Here, we review recent progress in understanding extracellular vesicle biology and the role of extracellular vesicles in disease, discuss emerging therapeutic opportunities and consider the associated challenges.

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Extracellular vesicles: biology and emerging therapeutic opportunities

MicroRNAs in Stress Signaling and Human Disease

The shear-responsive transcription factor Kruppel-like factor 2 (KLF2) is a critical regulator of endothelial gene expression patterns induced by atheroprotective flow. As microRNAs (miRNAs) post-transcriptionally control gene expression in many pathogenic and physiological processes, we investigated the regulation of miRNAs by KLF2 in endothelial cells. KLF2 binds to the promoter and induces a significant upregulation of the miR-143/145 cluster. Interestingly, miR-143/145 has been shown to control smooth muscle cell (SMC) phenotypes; therefore, we investigated the possibility of transport of these miRNAs between endothelial cells and SMCs. Indeed, extracellular vesicles secreted by KLF2-transduced or shear-stress-stimulated HUVECs are enriched in miR-143/145 and control target gene expression in co-cultured SMCs. Extracellular vesicles derived from KLF2-expressing endothelial cells also reduced atherosclerotic lesion formation in the aorta of ApoE(-/-) mice. Combined, our results show that atheroprotective stimuli induce communication between endothelial cells and SMCs through an miRNA- and extracellular-vesicle-mediated mechanism and that this may comprise a promising strategy to combat atherosclerosis.

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Atheroprotective communication between endothelial cells and smooth muscle cells through miRNAs.

State-of-the-art on use of insects as animal feed.

As today’s process technologies continuously scale down, circuits become increasingly more vulnerable to radiation-induced soft errors in nanoscale VLSI technologies. The reduction of node capacitance and supply voltages coupled with increasingly denser chips are raising soft error rates and making them an important design issue. This research work is focused on the development of design techniques for high-reliability modern VLSI technologies, focusing mainly on Radiation-induced Single Event Transient. In this work, we evaluate the complete life-cycle of the SET pulse from the generation to the mitigation. A new simulation tool, Rad-Ray, has been developed to simulate and model the passage of heavy ion into the silicon matter of modern Integrated Circuit and predict the transient voltage pulse taking into account the physical description of the design. An analysis and mitigation tool has been developed to evaluate the propagation of the predicted SET pulses within the circuit and apply a selective mitigation technique to the sensitive nodes of the circuit. The analysis and mitigation tools have been applied to many industrial projects as well as the EUCLID space mission project, including more than ten modules. The obtained results demonstrated the effectiveness of the proposed tools.

Digital Design Techniques for Dependable High Performance Computing

Predicting soft errors on SRAM-based FPGAs without a wasteful time-consuming or a high-cost has always been a very difficult goal. Among the available methods, we proposed an updated version of analytical approach to predict Single Event Effects (SEEs) based on the analysis of the circuit the FPGA implements. In this paper, we provide an experimental validation of this approach, by comparing the results it provides with a fault injection campaign. We adopted our analytical method for computing the error-rate of a design implemented on SRAM-based FPGA. Furthermore, we compared the obtained soft-error figure with the one measured by fault injection. Experimental analysis demonstrated the analytical method closely match the effective soft-error rates becoming a viable solution for the soft-error estimation at early design phases.

Validation of a tool for estimating the effects of soft-errors on modern SRAM-based FPGAs

Reconfigurable architectures are increasingly employed in a large range of embedded applications, mainly due to their ability to provide high performance and high flexibility, combined with the possibility to be tuned according to the specific task they address. Reconfigurable systems are today used in several application areas, and are also suitable for systems employed in safety-critical environments. The actual development trend in this area is focused on the usage of the reconfigurable features to improve the fault tolerance and the self-test and the self-repair capabilities of the considered systems. The state-of-the-art of the reconfigurable systems is today represented by Very Long Instruction Word (VLIW) processors and reconfigurable systems based on partially reconfigurable SRAM-based FPGAs. In this paper, we present an overview and accurate analysis of these two type of reconfigurable systems. The content of the paper is focused on analyzing design features, fail-safe and reconfigurable features oriented to self-adaptive mitigation and redundancy approaches applied during the design phase. Experimental results reporting a clear status of the test data and fault tolerance robustness are detailed and commented.

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Reconfigurable high performance architectures: How much are they ready for safety-critical applications?

In the recent years both software and hardware techniques have been adopted to carry out reliable designs, aimed at autonomously detecting the occurrence of faults, to allow discarding erroneous data and possibly performing the recovery of the system. The aim of this paper is the introduction of a combined use of software and hardware approaches to achieve a complete fault coverage in generic IP processors, with respect to SEU faults. Software techniques are preferably adopted to reduce the necessity and costs of modifying the processor architecture; since a complete fault coverage cannot be achieved, partial hardware redundancy techniques are then introduced to deal with the remaining, not covered, faults. The paper presents the methodological approach adopted to achieve the complete fault coverage, the proposed resulting architecture, and the experimental results gathered from the analysis of the fault injection campaigns.

Software and Hardware Techniques for SEU Detection in IP Processors

Testing SEUs in the configuration memory of SRAM-based FPGAs is very costly due to their large configuration memory, therefore it is necessary to optimize the generation of test patterns. In particular, in order to reduce the effort required of automatic test pattern generators, it is useful to identify early the unexcitable faults, i.e., those faults that cannot be excited by any combination of input signals. In this paper, the unexcitability of SEUs affecting the configuration bits controlling the routing resources of SRAM-based FPGAs is considered. Since this part of the configuration memory contains the largest number of configuration bits, its testing is particularly onerous. Faults in the routing resources are modeled considering the actual electrical behavior of the affected interconnections, thus the resulting fault model is more accurate than the classical open/short model usually considered. This paper introduces a methodology to prove the unexcitability of these faults. The methodology has been implemented in a tool based on a formal specification language (SAL) and a model checker (SAL-SMC). Results from the application of the tool to some circuits from the ITC'99 benchmark are reported.

Luca Sterpone

Papers

Digital Design Techniques for Dependable High Performance Computing

Validation of a tool for estimating the effects of soft-errors on modern SRAM-based FPGAs

Reconfigurable high performance architectures: How much are they ready for safety-critical applications?

Software and Hardware Techniques for SEU Detection in IP Processors

Unexcitability analysis of SEus affecting the routing structure of SRAM-based FPGAs