Lucas P. B. Lima

Bio: Lucas P. B. Lima is an academic researcher from State University of Campinas. The author has contributed to research in topics: Focused ion beam & Titanium nitride. The author has an hindex of 7, co-authored 22 publications receiving 184 citations. Previous affiliations of Lucas P. B. Lima include Katholieke Universiteit Leuven & ASM International.

Metal gate work function tuning by Al incorporation in TiN

Abstract: Titanium nitride (TiN) films have been used as gate electrode on metal-oxide-semiconductor (MOS) devices. TiN effective work function (EWF) values have been often reported as suitable for pMOS. For nMOS devices, a gate electrode with sufficient low EWF value with a similar robustness as TiN is a challenge. Thus, in this work, aluminum (Al) is incorporated into the TiN layer to reduce the EWF values, which allows the use of this electrode in nMOS devices. Titanium aluminum (TiAl), Al, and aluminum nitride (AlN) layers were introduced between the high-k (HfO2) dielectric and TiN electrode as Al diffusion sources. Pt/TiN (with Al diffusion) and Pt/TiN/TiAl/TiN structures were obtained and TiN EWF values were reduced of 0.37 eV and 1.09 eV, respectively. The study of TiN/AlN/HfO2/SiO2/Si/Al structures demonstrated that AlN layer can be used as an alternative film for TiN EWF tuning. A decrease of 0.26 eV and 0.45 eV on TiN EWF values were extracted from AlN/TiN stack and AlN/TiN laminate stack, respectively. AlN/TiN laminate structures have been shown to be more effective to reduce the TiN work function than just increasing the AlN thickness.

Titanium nitride as promising gate electrode for MOS technology

Abstract: Titanium nitride (TiN) films have been grown on Si (100) substrates by DC. reactive magnetron sputtering from a titanium (Ti) metallic target at different nitrogen partial pressures (80–10 sccm) and different power (500–1500 W). The effects of the nitrogen pressure and power on structural and electrical properties of TiN films were investigated by measuring their X-ray diffraction (crystal orientation), Atomic Force Microscopy (surface roughness), four-probe technique (electrical resistivity) and film thickness. It is show that deposition rate (13–65 nm/min) decrease with an increase of nitrogen pressure. The films have the grain size (0.001–0.027 μm2) along the sample surface and the size of the grain increase with an increase of nitrogen partial pressure. The X-ray diffraction measurement show that films were crystalline (with preferred orientation (311)), but some of them were polycrystalline ((311) and (111) preferred orientation). These films have been used as gate electrodes in MOS capacitors, which were fabricated with TiN and SiNxOy as gate electrode and dielectric, respectively. With 20 minutes of annealing time, the extracted TiN work function and flat-band voltage were about 4.65 eV and -0.29 V, which indicates that TiN can be used as mig-gap electrode for MOS technology. (© 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Very Low Temperature Epitaxy of Group-IV Semiconductors for Use in FinFET, Stacked Nanowires and Monolithic 3D Integration

Abstract: As CMOS scaling proceeds with sub-10 nm nodes, new architectures and materials are implemented to continue increasing performances at constant footprint. Strained and stacked channels and 3D-integrated devices have for instance been introduced for this purpose. A common requirement for these new technologies is a strict limitation in thermal budgets to preserve the integrity of devices already present on the chips. We present our latest developments on low-temperature epitaxial growth processes, ranging from channel to source/drain applications for a variety of devices and describe options to address the upcoming challenges.

Influence of Al/TiN/SiO2 structure on MOS capacitor, Schottky diode, and fin field effect transistors devices

Abstract: Titanium nitride (TiN) films were tested for their suitability as upper electrodes in metal–oxide–semiconductor (MOS) capacitors and Schottky diodes and as metal gate electrodes in fin field effect transistor devices. TiOxNy formation on TiN surfaces was confirmed by x-ray photoelectron spectroscopy and appears to be associated with exposure of the metal electrodes to ambient air. In order to avoid the formation of TiOxNy and TiO2, a layer of aluminum (Al) was deposited in situ after the TiN deposition. TiN work function was calculated for the devices to study how dipole variation at the interface TiN/SiO2 influences TiN work function. TiOxNy and TiO2 formation at the film surface was found to affect the dipole variations at the TiN/SiO2 interface increasing the dipole influence on MOS structure. Furthermore, the estimated values TiN work function are suitable for complementary metal–oxide–semiconductor (CMOS) technology. Finally, this work had shown that Al/TiN structure can be used in CMOS technology, especially on n-type metal–oxide–semiconductor field effect transistor devices.

Material platforms for optical metasurfaces

Abstract: Abstract Optical metasurfaces are judicously engineered electromagnetic interfaces that can control and manipulate many of light’s quintessential properties, such as amplitude, phase, and polarization. These artificial surfaces are composed of subwavelength arrays of optical antennas that experience resonant light-matter interaction with incoming electromagnetic radiation. Their ability to arbitrarily engineer optical interactions has generated considerable excitement and interest in recent years and is a promising methodology for miniaturizing optical components for applications in optical communication systems, imaging, sensing, and optical manipulation. However, development of optical metasurfaces requires progress and solutions to inherent challenges, namely large losses often associated with the resonant structures; large-scale, complementary metal-oxide-semiconductor-compatible nanofabrication techniques; and incorporation of active control elements. Furthermore, practical metasurface devices require robust operation in high-temperature environments, caustic chemicals, and intense electromagnetic fields. Although these challenges are substantial, optical metasurfaces remain in their infancy, and novel material platforms that offer resilient, low-loss, and tunable metasurface designs are driving new and promising routes for overcoming these hurdles. In this review, we discuss the different material platforms in the literature for various applications of metasurfaces, including refractory plasmonic materials, epitaxial noble metal, silicon, graphene, phase change materials, and metal oxides. We identify the key advantages of each material platform and review the breakthrough devices that were made possible with each material. Finally, we provide an outlook for emerging metasurface devices and the new material platforms that are enabling such devices.

Next generation high-k dielectrics for DRAM produced by atomic layer deposition studied by transmission electron microscopy

Abstract: Schlusselelemente der heutigen Technologie wie der dynamische random-access memory (DRAM) folgen dem Trend der Miniaturisierung. Das verlangt, dass die dielektrische Schicht, die eine wichtige Komponente in diesen Strukturen ist, dunner wird. Da die Miniaturisierung schnell voranschreitet, nahern sich die Geratekomponenten den fundamentalen physikalischen Limitierungen. Es gibt zwei Hauptstrategien um die Kapazitat zu erhohen, ohne die Dicke der dielektrischen Schicht weiter zu verringern. Eine ist es, Oberflachen zu nutzen die ein hohes Aspektverhaltnis (AV) aufweisen, um die effektive Oberflache zu vergrosern. Die andere ist es, high-k Materialien anstatt SiO2 zu verwenden. Die Schlusseltechnologie um ultra-dunne, high-k dielektrische Schichten gleichmasig und ohne jeglicher Locher auf Substrate mit hohem AV aufzutragen ist atomic layer deposition (ALD, wtl. Atomlagenabscheidung). ALD ist eine Art von chemischer Gasphasenabscheidung, in der die chemische Reaktion in zwei sequenzielle, selbst-limitierende Reaktionen mit der Oberflache aufgeteilt wird, was Filme mit hoher Qualitat und guter Uniformitat gewahrleistet. Plasma-erweitertes ALD (PEALD) ist eine eher neue Erweiterung in der Plasma Teilchen anstatt Wasserdampf zur Oxidierung verwendet werden. In dieser Dissertation wird Arbeit zu PEALD von TiO2 auf Graben mit hohem AV prasentiert und mit Transmissionselektronenmikroskopie (TEM) untersucht. TEM zeigt, dass die Uberdeckung von PEALD TiO2 auf diesen Substraten verbessert werden kann indem man die Plasma Einwirkungszeit verlangert. Dann wird PEALD von dem high-k Perowskit BaTiO3 (BTO) untersucht. Zuletzt berichten wir die besten elektrischen Betriebseigenschaften fur Al-dotiertes BTO aufgetragen auf einer Zr-dotierten TiN Elektrode. Wir glauben, dass diese Resultate das Sprungbrett fur die nachsten Generationen von high-k dielektrischen Filmen fur DRAM sein konnte.

III–V/Ge channel MOS device technologies in nano CMOS era

Abstract: CMOS utilizing high-mobility III–V/Ge channels on Si substrates is expected to be one of the promising devices for high-performance and low power advanced LSIs in the future, because of its enhanced carrier transport properties. However, there are many critical issues and difficult challenges for realizing III–V/Ge-based CMOS on the Si platform such as (1) the formation of high-crystal-quality Ge/III–V films on Si substrates, (2) gate stack technologies to realize superior MOS/MIS interface quality, (3) the formation of a source/drain (S/D) with low resistivity and low leakage current, (4) process integration to realize ultrashort channel devices, and (5) total CMOS integration including Si CMOS. In this paper, we review the recent progress in III–V/Ge MOS devices and process technologies as viable approaches to solve the above critical problems on the basis of our recent research activities. The technologies include MOS gate stack formation, high-quality channel formation, low-resistance S/D formation, and CMOS integration. For the Ge device technologies, we focus on the gate stack technology and Ge channel formation on Si. Also, for the III–V MOS device technologies, we mainly address the gate stack technology, III–V channel formation on Si, the metal S/D technology, and implementation of these technologies into short-channel III–V-OI MOSFETs on Si substrates. On the basis of the present status of the achievements, we finally discuss the possibility of various CMOS structures using III–V/Ge channels.

Miniaturization of CMOS.

Abstract: When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today’s 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.