Luciano F. S. Alves

Bio: Luciano F. S. Alves is an academic researcher from University of Grenoble. The author has contributed to research in topics: Power semiconductor device & Switching time. The author has an hindex of 5, co-authored 12 publications receiving 179 citations. Previous affiliations of Luciano F. S. Alves include Federal University of Campina Grande.

Low-Frequency Power Decoupling in Single-Phase Applications: A Comprehensive Overview

Abstract: This paper presents a literature overview of all techniques proposed until the submission of this paper in terms of mitigating power oscillation in single-phase applications. This pulsating energy is the major factor for increasing the size of passive components and power losses in the converter and can be responsible for losses or malfunctioning of the dc sources. Reduction of power ripple at twice the fundamental frequency is one of the key elements to increase power converter density without lack of dc stiffness. Pulsation reduction is achieved by incorporating control techniques or auxiliary circuitries with energy storage capability in reactive elements to avoid this oscillating power to propagate through the converter, creating what is called as single-phase power decoupling. The topologies are divided as: rectifiers, inverters, and bidirectional. Among them, it is possible to classify as isolated and nonisolated converters. The energy storage method may be classify as: capacitive and inductive. For the power decoupling technique, it is convenient to divide as control and topology. The power decoupling technique may be implemented as series or parallel with respect to the ac, dc or link side. This paper represents the best reference on this topic.

SIC power devices in power electronics: An overview

Abstract: Silicon (Si) power devices have dominated the world of Power Electronics in the last years, and they have proven to be efficient in a wide range of applications. But high power, high frequency and high temperature applications require more than Si can deliver. With the advance of technology, Silicon Carbide (SiC) and Gallium Nitride (GaN) power devices have evolved from immature prototypes in laboratories to a viable alternative to Si-based power devices in high-efficiency and high-power density applications. SiC and GaN devices have several compelling advantages: high-breakdown voltage, high-operating electric field, high-operating temperature, high-switching frequency and low losses. This paper provides a general review on the properties of these materials comparing some performance between Si and SiC devices for typical power electronics applications. Based on studied information, line of progress and the current state of developing, SiC seems to be the most viable substitute in high power and high temperature applications in the mid-term of Si, due to the fact that the GaN is still used in a reduced number of applications.

Review on SiC-MOSFET devices and associated gate drivers

Abstract: Silicon (Si) power devices have dominated the world of Power Electronics in the last years, and they have proven to be efficient in a wide range of applications. But high power, high frequency and high temperature applications require more than Si can deliver. Wide Band-Gap (WBG) materials such as Silicon Carbide (SiC) and Gallium Nitride (GaN) were intensively researched and developed for power applications due to the substantial advantages their inherent material properties could realize at device level. The SiC-MOSFET has unique capabilities that make it a superior switch when compared to its silicon counterparts. By nature of its material advantages, SiC MOSFETs provide lower switching loss, lower ON-resistance across its operating temperature range, and superior thermal properties. However the characteristics of SiC devices require consideration of the gate-driver circuit to optimize the switching performance. SiC-MOSFETs, due to their ultra fast switching speed, are susceptible to have harsh transients introduced by rapid change in the drain-to-source voltage. Therefore, the gate drive requirements of SiC-MOSFETs require a thorough analysis in order to prevent high dv/dt transients from causing erratic switching behavior or unnecessary switching loss. This paper provides a general review on the properties of SiC comparing some performances between Si-MOSFETs and SiC-MOSFETs for typical power electronics applications. The main constraints and issues of the SiC-MOSFET switching process are presented, and some recent proposed Gate Drivers to solve these constraints are presented throughout this work.

High-frequency pulsating DC-link three-phase inverter without electrolytic capacitor

Abstract: In this work it is presented a generalized converter configuration for a high-frequency pulsating DC-link inverter for three-phase applications The configuration consists of a DC/DC-pulsating converter cascaded with a DC-link capacitor-less three-phase inverter Due to the absence of a DC-link electrolytic capacitor, the presented inverter guarantees a long life-time and high power density The DC/DC-pulsating converter aims to generate the high-frequency pulsating DC-link waveform profile which has to be synchronized with the three-phase inverter PWM Comparing to the conventional PWM, the harmonic spectrum of voltages is the same, but the pulsating DC-link three-phase inverter presents reduced switching losses due to the fact that only one leg commutes during a switching period while the other two legs keep clamped in high or low Details of control strategy and modulation are presented Experimental results of a 16 kW prototype are presented to validate the effective operation of the proposed structure

Gate Driver Architectures Impacts on Voltage Balancing of SiC MOSFETs in Series Connection

Abstract: In power converter configurations like multi-cell, multi-level, series connection of power devices etc. under very high switching speeds, several dv/dt sources generated at different floating points produce conducted EMI perturbations from the power part to the control part through the many gate driver circuitries. The modifications of the parasitic capacitive propagation paths between the power and the control sides have impacts on the circulating current produced by high dv/dt, which, in turns, affects the voltages distributions (static and transient) among the power devices. This paper presents news architectures for gate drivers power supplies implementations in series connection to minimize parasitic currents, especially reducing the common mode currents and to minimize the unbalance voltages of SiC-MOSFET devices in series connections. Simulations and experiments validate the advantages of the gate driver power supplies proposed architectures on the common mode currents and drain-to-source voltages of series-connected devices.

Control Schemes for Reducing Second Harmonic Current in Two-Stage Single-Phase Converter: An Overview From DC-Bus Port-Impedance Characteristics

Abstract: The instantaneous input and output power of two-stage single-phase converter are imbalanced, resulting in the second harmonic current (SHC) in the dc–dc converter, dc source, or dc load. This paper revisits the SHC reduction control schemes from the dc-bus port-impedance perspective. The dc–dc converters in two-stage single-phase converters are categorized into two types, namely, bus-voltage-controlled converter (BVCC) and bus-current-controlled converter (BCCC). The dc-bus port impedance of the BVCC is revealed to be approximately inversely proportional to the voltage loop gain. Thus, for reducing the SHC in the BVCC, advanced control schemes are required for increasing the dc-bus port impedance. The dc-bus port impedance of the BCCC is proved to be a negative resistor within the control bandwidth. Hence, for reducing the SHC in the BCCC, the dc-bus voltage ripple should be limited. From the dc-bus port-impedance perspective, the SHC reduction control schemes are reclassified into closed-loop-design-based, virtual-impedance-based, and power-decoupling-based approaches, based on which, different SHC reduction control schemes are carefully reviewed and compared. Finally, potential challenges and issues are discussed.

Second-Harmonic Current Reduction for Two-Stage Inverter With Boost-Derived Front-End Converter: Control Schemes and Design Considerations

Abstract: The instantaneous output power of the two-stage single-phase inverter pulsates at twice the output frequency $(2f_{{\rm{o}}})$ , generating notorious second-harmonic current (SHC) in the front-end dc–dc converter and the input dc voltage source. This paper focuses on the SHC reduction for a two-stage single-phase inverter with boost-derived front-end converter. To reduce the SHC, a virtual series impedance, which has high impedance at $2f_{{\rm{o}}}$ while low impedance at other frequencies, is introduced in series with the boost diode or the boost inductor to increase the impedance of the boost-diode branch or boost-inductor branch at $2f_{{\rm{o}}}$ . Meanwhile, for achieving good dynamic performance, a virtual parallel impedance, which exhibits infinite impedance at $2f_{{\rm{o}}}$ while low impedance at other frequencies, is introduced in parallel with the dc-bus capacitor to reduce the output impedance of the boost-derived converter at the frequencies except for $2f_{{\rm{o}}}$ . The virtual series impedance is realized by the feedback of the boost-diode current or the boost-inductor current, while the virtual parallel impedance is implemented by the feedback of the dc-bus voltage. Based on the virtual-impedance approach, a variety of SHC reduction control schemes are derived. A step-by-step closed-loop parameters design approach with considerations of reducing the SHC and improving the dynamic performance is also proposed for the derived SHC reduction control schemes. Finally, a 1-kW prototype is built and tested, and experimental results are presented to verify the effectiveness of the proposed SHC reduction control schemes.

An Overview of Capacitive DC-Links-Topology Derivation and Scalability Analysis

Abstract: Capacitive dc-links are widely used in voltage source converters for power balance, voltage ripple limitation, and short-term energy storage. A typical solution, which uses aluminum electrolytic capacitors for such applications, is assumed to be one of the weakest links in power electronic systems, therefore, also becoming one of the lifetime bottlenecks of power electronic systems. Various passive and active capacitive dc-link solutions have been proposed intending to improve the reliability of the dc-links qualitatively, making great effort to diverting the instantaneous pulsating power into extra reliable storage components. In this paper, a generic topology derivation method for single-phase power converters with active capacitive dc-link integrated has been proposed, which can derive all existing topologies, and identify a few new topologies. According to the synthesis results, the main achievements in research on capacitive dc-link solutions are reviewed and presented chronologically as well as thematically ordered. Furthermore, the reliability-oriented design procedure is applied to size the chip area of active switching devices and the passive components to fulfill a specific lifetime target and system specification, as well as compare the overall capacitive energy storage, energy buffer ratio, and the cost of different solutions. The cost comparisons are performed with a scalable lifetime target and power rating. It reveals that different conclusions can be drawn with different lifetime targets in terms of cost-effectiveness.

Overview of Transformerless Photovoltaic Grid-Connected Inverters

Abstract: Transformerless grid-connected inverters (TLI) feature high efficiency, low cost, low volume, and weight due to using neither line-frequency transformers nor high-frequency transformers Therefore, TLIs have been extensively investigated in the academic community and popularly installed in distributed photovoltaic grid-connected systems during the past decade This article analyzes and summarizes the state of the art of TLI techniques, three rules of maintaining constant common-mode voltage (CMV) of TLIs at switching frequency have been concluded from a generic CMV analysis model at the beginning Second, suppression methods of leakage current (LC) and dc current injection (DCCI), so-called two key challenges for first-generation TLIs, have been classified and discussed in detail, respectively Finally, future trends and some challenges of TLIs based on wide bandgap devices named second-generation TLIs have been presented in this article