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Luis Entrena

Bio: Luis Entrena is an academic researcher from Charles III University of Madrid. The author has contributed to research in topics: Fault injection & Redundancy (engineering). The author has an hindex of 23, co-authored 131 publications receiving 1870 citations. Previous affiliations of Luis Entrena include Bell Labs & Technical University of Madrid.


Papers
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Journal ArticleDOI
TL;DR: In this paper, a very fast and cost effective solution for SEU sensitivity evaluation is presented, which uses FPGA emulation in an autonomous manner to fully exploit the FPGAs emulation speed.
Abstract: The appearance of nanometer technologies has produced a significant increase of integrated circuit sensitivity to radiation, making the occurrence of soft errors much more frequent, not only in applications working in harsh environments, like aerospace circuits, but also for applications working at the earth surface. Therefore, hardened circuits are currently demanded in many applications where fault tolerance was not a concern in the very near past. To this purpose, efficient hardness evaluation solutions are required to deal with the increasing size and complexity of modern VLSI circuits. In this paper, a very fast and cost effective solution for SEU sensitivity evaluation is presented. The proposed approach uses FPGA emulation in an autonomous manner to fully exploit the FPGA emulation speed. Three different techniques to implement it are proposed and analyzed. Experimental results show that the proposed Autonomous Emulation approach can reach execution rates higher than one million faults per second, providing a performance improvement of two orders of magnitude with respect to previous approaches. These rates give way to consider very large fault injection campaigns that were not possible in the past

142 citations

Journal ArticleDOI
TL;DR: This paper presents a method for multilevel logic optimization for combinational and synchronous sequential circuits that can efficiently identify those wires for addition that would create more redundancies elsewhere in the network.
Abstract: This paper presents a method for multilevel logic optimization for combinational and synchronous sequential circuits. The circuits are optimized through iterative addition and removal of redundancies. Adding redundant wires to a circuit may cause one or many existing irredundant wires and/or gates to become redundant. If the amount of added redundancies is less than the amount of created redundancies, the transformation of adding followed by removing redundancies will result in a smaller circuit. Based upon the Automatic Test Pattern Generation (ATPG) techniques, the proposed method can efficiently identify those wires for addition that would create more redundancies elsewhere in the network. Experiments on ISCAS-85 combinational benchmark circuits show that best results are obtained for most of them. For sequential circuits, experimental results on MCNC FSM benchmarks and ISCAS-89 sequential benchmark circuits show that a significant amount of area reduction can be achieved beyond combinational optimization and sequential redundancy removal. >

127 citations

Proceedings ArticleDOI
22 Feb 1993
TL;DR: A multilevel logic optimization technique is presented that is a generalization of redundancy removal and Boolean resubstitution that can efficiently locate redundant wires and/or nodes after adding a redundant wire.
Abstract: A multilevel logic optimization technique is presented that is a generalization of redundancy removal and Boolean resubstitution. The network is optimized through iterative addition and deletion of redundant connections. With the use of the connection fault model, the problem of identifying connections that can be made without affecting the network's functionality is converted into the problem of identifying redundant connection faults. Efficient test generation algorithms can thus be applied directly. Techniques that can efficiently locate redundant wires and/or nodes after adding a redundant wire are also proposed. Experiment results on MCNC benchmark circuits show that, on average, a 16% reduction in gate count and a 20% reduction in connection count can be achieved at a low computational cost. The suggested technique can also be applied for timing optimization. >

106 citations

Journal ArticleDOI
TL;DR: Experimental results demonstrate that AMUSE can emulate soft error effects for complex circuits including microprocessors and memories, considering the real delays of an ASIC technology, and support massive fault injection campaigns, in the order of tens of millions of faults within acceptable time.
Abstract: Estimation of soft error sensitivity is crucial in order to devise optimal mitigation solutions that can satisfy reliability requirements with reduced impact on area, performance, and power consumption. In particular, the estimation of Single Event Transient (SET) effects for complex systems that include a microprocessor is challenging, due to the huge potential number of different faults and effects that must be considered, and the delay-dependent nature of SET effects. In this paper, we propose a multilevel FPGA emulation-based fault injection approach for evaluation of SET effects called AMUSE (Autonomous MUltilevel emulation system for Soft Error evaluation). This approach integrates Gate level and Register-Transfer level models of the circuit under test in a FPGA and is able to switch to the appropriate model as needed during emulation. Fault injection is performed at the Gate level, which provides delay accuracy, while fault propagation across clock cycles is performed at the Register-Transfer level for higher performance. Experimental results demonstrate that AMUSE can emulate soft error effects for complex circuits including microprocessors and memories, considering the real delays of an ASIC technology, and support massive fault injection campaigns, in the order of tens of millions of faults within acceptable time.

102 citations

Proceedings ArticleDOI
07 Nov 1993
TL;DR: This paper presents a method of multi-level logic optimization for combinational and synchronous sequential logic that can efficiently identify those connections that would create more redundancies and, thus, result in a smaller network.
Abstract: This paper presents a method of multi-level logic optimization for combinational and synchronous sequential logic. The circuits are optimized through iterative addition and removal of redundancies. Among the large number of possible connections that can be added, the proposed method can efficiently identify those connections that would create more redundancies and, thus, would result in a smaller network. This is done with the use of combinational and sequential ATPG techniques based up the concept of mandatory assignments. Experiments on ISCAS-85 combinational benchmark circuits show that best results are obtained for most of them. For sequential circuits, experimental results on MCNC FSM benchmarks and ISCAS-89 sequential benchmark circuits show that a significant amount of area reduction can be achieved beyond combinational optimization and sequential redundancy removal.

95 citations


Cited by
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01 Apr 1997
TL;DR: The objective of this paper is to give a comprehensive introduction to applied cryptography with an engineer or computer scientist in mind on the knowledge needed to create practical systems which supports integrity, confidentiality, or authenticity.
Abstract: The objective of this paper is to give a comprehensive introduction to applied cryptography with an engineer or computer scientist in mind. The emphasis is on the knowledge needed to create practical systems which supports integrity, confidentiality, or authenticity. Topics covered includes an introduction to the concepts in cryptography, attacks against cryptographic systems, key use and handling, random bit generation, encryption modes, and message authentication codes. Recommendations on algorithms and further reading is given in the end of the paper. This paper should make the reader able to build, understand and evaluate system descriptions and designs based on the cryptographic components described in the paper.

2,188 citations

Journal ArticleDOI
TL;DR: This review discusses the current status of devices that generate quantum random numbers, and discusses the most fundamental processes based on elementary quantum mechanical processes.
Abstract: In mathematics and computer science, random numbers have the role of a resource for assisting proofs, making cryptography secure, and enabling computational protocols. This role motivates efforts to produce random numbers as a physical process. Potential physical sources abound, but arguably the most fundamental are those based on elementary quantum mechanical processes. This review discusses the current status of devices that generate quantum random numbers.

446 citations

Book
01 Jan 2007
TL;DR: In this article, Gabor et al. proposed a 3D face recognition method based on the LBP representation of the face and the texture of the textured part of the human face.
Abstract: Face Recognition.- Super-Resolved Faces for Improved Face Recognition from Surveillance Video.- Face Detection Based on Multi-Block LBP Representation.- Color Face Tensor Factorization and Slicing for Illumination-Robust Recognition.- Robust Real-Time Face Detection Using Face Certainty Map.- Poster I.- Motion Compensation for Face Recognition Based on Active Differential Imaging.- Face Recognition with Local Gabor Textons.- Speaker Verification with Adaptive Spectral Subband Centroids.- Similarity Rank Correlation for Face Recognition Under Unenrolled Pose.- Feature Correlation Filter for Face Recognition.- Face Recognition by Discriminant Analysis with Gabor Tensor Representation.- Fingerprint Enhancement Based on Discrete Cosine Transform.- Biometric Template Classification: A Case Study in Iris Textures.- Protecting Biometric Templates with Image Watermarking Techniques.- Factorial Hidden Markov Models for Gait Recognition.- A Robust Fingerprint Matching Approach: Growing and Fusing of Local Structures.- Automatic Facial Pose Determination of 3D Range Data for Face Model and Expression Identification.- SVDD-Based Illumination Compensation for Face Recognition.- Keypoint Identification and Feature-Based 3D Face Recognition.- Fusion of Near Infrared Face and Iris Biometrics.- Multi-Eigenspace Learning for Video-Based Face Recognition.- Error-Rate Based Biometrics Fusion.- Online Text-Independent Writer Identification Based on Stroke's Probability Distribution Function.- Arm Swing Identification Method with Template Update for Long Term Stability.- Walker Recognition Without Gait Cycle Estimation.- Comparison of Compression Algorithms' Impact on Iris Recognition Accuracy.- Standardization of Face Image Sample Quality.- Blinking-Based Live Face Detection Using Conditional Random Fields.- Singular Points Analysis in Fingerprints Based on Topological Structure and Orientation Field.- Robust 3D Face Recognition from Expression Categorisation.- Fingerprint Recognition Based on Combined Features.- MQI Based Face Recognition Under Uneven Illumination.- Learning Kernel Subspace Classifier.- A New Approach to Fake Finger Detection Based on Skin Elasticity Analysis.- An Algorithm for Biometric Authentication Based on the Model of Non-Stationary Random Processes.- Identity Verification by Using Handprint.- Reducing the Effect of Noise on Human Contour in Gait Recognition.- Partitioning Gait Cycles Adaptive to Fluctuating Periods and Bad Silhouettes.- Repudiation Detection in Handwritten Documents.- A New Forgery Scenario Based on Regaining Dynamics of Signature.- Curvewise DET Confidence Regions and Pointwise EER Confidence Intervals Using Radial Sweep Methodology.- Bayesian Hill-Climbing Attack and Its Application to Signature Verification.- Wolf Attack Probability: A New Security Measure in Biometric Authentication Systems.- Evaluating the Biometric Sample Quality of Handwritten Signatures.- Outdoor Face Recognition Using Enhanced Near Infrared Imaging.- Latent Identity Variables: Biometric Matching Without Explicit Identity Estimation.- Poster II.- 2^N Discretisation of BioPhasor in Cancellable Biometrics.- Probabilistic Random Projections and Speaker Verification.- On Improving Interoperability of Fingerprint Recognition Using Resolution Compensation Based on Sensor Evaluation.- Demographic Classification with Local Binary Patterns.- Distance Measures for Gabor Jets-Based Face Authentication: A Comparative Evaluation.- Fingerprint Matching with an Evolutionary Approach.- Stability Analysis of Constrained Nonlinear Phase Portrait Models of Fingerprint Orientation Images.- Effectiveness of Pen Pressure, Azimuth, and Altitude Features for Online Signature Verification.- Tracking and Recognition of Multiple Faces at Distances.- Face Matching Between Near Infrared and Visible Light Images.- User Classification for Keystroke Dynamics Authentication.- Statistical Texture Analysis-Based Approach for Fake Iris Detection Using Support Vector Machines.- A Novel Null Space-Based Kernel Discriminant Analysis for Face Recognition.- Changeable Face Representations Suitable for Human Recognition.- "3D Face": Biometric Template Protection for 3D Face Recognition.- Quantitative Evaluation of Normalization Techniques of Matching Scores in Multimodal Biometric Systems.- Keystroke Dynamics in a General Setting.- A New Approach to Signature-Based Authentication.- Biometric Fuzzy Extractors Made Practical: A Proposal Based on FingerCodes.- On the Use of Log-Likelihood Ratio Based Model-Specific Score Normalisation in Biometric Authentication.- Predicting Biometric Authentication System Performance Across Different Application Conditions: A Bootstrap Enhanced Parametric Approach.- Selection of Distinguish Points for Class Distribution Preserving Transform for Biometric Template Protection.- Minimizing Spatial Deformation Method for Online Signature Matching.- Pan-Tilt-Zoom Based Iris Image Capturing System for Unconstrained User Environments at a Distance.- Fingerprint Matching with Minutiae Quality Score.- Uniprojective Features for Gait Recognition.- Cascade MR-ASM for Locating Facial Feature Points.- Reconstructing a Whole Face Image from a Partially Damaged or Occluded Image by Multiple Matching.- Robust Hiding of Fingerprint-Biometric Data into Audio Signals.- Correlation-Based Fingerprint Matching with Orientation Field Alignment.- Vitality Detection from Fingerprint Images: A Critical Survey.- Optimum Detection of Multiplicative-Multibit Watermarking for Fingerprint Images.- Fake Finger Detection Based on Thin-Plate Spline Distortion Model.- Robust Extraction of Secret Bits from Minutiae.- Fuzzy Extractors for Minutiae-Based Fingerprint Authentication.- Coarse Iris Classification by Learned Visual Dictionary.- Nonlinear Iris Deformation Correction Based on Gaussian Model.- Shape Analysis of Stroma for Iris Recognition.- Biometric Key Binding: Fuzzy Vault Based on Iris Images.- Multi-scale Local Binary Pattern Histograms for Face Recognition.- Histogram Equalization in SVM Multimodal Person Verification.- Learning Multi-scale Block Local Binary Patterns for Face Recognition.- Horizontal and Vertical 2DPCA Based Discriminant Analysis for Face Verification Using the FRGC Version 2 Database.- Video-Based Face Tracking and Recognition on Updating Twin GMMs.- Poster III.- Fast Algorithm for Iris Detection.- Pyramid Based Interpolation for Face-Video Playback in Audio Visual Recognition.- Face Authentication with Salient Local Features and Static Bayesian Network.- Fake Finger Detection by Finger Color Change Analysis.- Feeling Is Believing: A Secure Template Exchange Protocol.- SVM-Based Selection of Colour Space Experts for Face Authentication.- An Efficient Iris Coding Based on Gauss-Laguerre Wavelets.- Hardening Fingerprint Fuzzy Vault Using Password.- GPU Accelerated 3D Face Registration / Recognition.- Frontal Face Synthesis Based on Multiple Pose-Variant Images for Face Recognition.- Optimal Decision Fusion for a Face Verification System.- Robust 3D Head Tracking and Its Applications.- Multiple Faces Tracking Using Motion Prediction and IPCA in Particle Filters.- An Improved Iris Recognition System Using Feature Extraction Based on Wavelet Maxima Moment Invariants.- Color-Based Iris Verification.- Real-Time Face Detection and Recognition on LEGO Mindstorms NXT Robot.- Speaker and Digit Recognition by Audio-Visual Lip Biometrics.- Modelling Combined Handwriting and Speech Modalities.- A Palmprint Cryptosystem.- On Some Performance Indices for Biometric Identification System.- Automatic Online Signature Verification Using HMMs with User-Dependent Structure.- A Complete Fisher Discriminant Analysis for Based Image Matrix and Its Application to Face Biometrics.- SVM Speaker Verification Using Session Variability Modelling and GMM Supervectors.- 3D Model-Based Face Recognition in Video.- Robust Point-Based Feature Fingerprint Segmentation Algorithm.- Automatic Fingerprints Image Generation Using Evolutionary Algorithm.- Audio Visual Person Authentication by Multiple Nearest Neighbor Classifiers.- Improving Classification with Class-Independent Quality Measures: Q-stack in Face Verification.- Biometric Hashing Based on Genetic Selection and Its Application to On-Line Signatures.- Biometrics Based on Multispectral Skin Texture.- Application of New Qualitative Voicing Time-Frequency Features for Speaker Recognition.- Palmprint Recognition Based on Directional Features and Graph Matching.- Tongue-Print: A Novel Biometrics Pattern.- Embedded Palmprint Recognition System on Mobile Devices.- Template Co-update in Multimodal Biometric Systems.- Continual Retraining of Keystroke Dynamics Based Authenticator.

314 citations

Proceedings ArticleDOI
20 Apr 2009
TL;DR: This paper proposes an approach to quantify both the error on the presented results and the confidence on thePresent interval, and the computation of the required number of faults to inject in order to achieve a given confidence and error interval.
Abstract: Fault injection has become a very classical method to determine the dependability of an integrated system with respect to soft errors. Due to the huge number of possible error configurations in complex circuits, a random selection of a subset of potential errors is usual in practical experiments. The main limitation of such a selection is the confidence in the outcomes that is never quantified in the articles. This paper proposes an approach to quantify both the error on the presented results and the confidence on the presented interval. The computation of the required number of faults to inject in order to achieve a given confidence and error interval is also discussed. Experimental results are shown and fully support the presented approach.

280 citations