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M Gnana Prakash

Bio: M Gnana Prakash is an academic researcher from VIT University. The author has contributed to research in topics: Inverter & Topology (electrical circuits). The author has an hindex of 1, co-authored 1 publications receiving 4 citations.

Papers
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Proceedings ArticleDOI
19 Jun 2014
TL;DR: In this paper, a new multilevel inverter with reduced number of switches is proposed, which has three Dc sources and six switches and it is well suited for high power applications.
Abstract: This Multilevel inverter technology has recently become known has a very important substitute in the area of high power medium voltage energy control. Though multilevel inverter has several advantages it has drawbacks like for higher levels more number of semiconductor switches needed this may lead to huge size and cost of the inverter is very high. So in order to overcome this problem a new multilevel inverter is proposed with reduced number of switches. The proposed topology has three Dc sources and six Switches and it is well suited for high power applications. Level shifted PWM technique is used to generate the sine wave for the proposed topology. The Circuit is simulated in Matlab/Simulink and effect of harmonic spectrum is analyzed through the Fast Fourier transform window. The performance parameters of the proposed multilevel inverter are compared with the conventional MLI and another seven level existing topologies.

4 citations


Cited by
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Proceedings ArticleDOI
13 Apr 2018
TL;DR: Harmonic elimination using Genetic Algorithm based Selective Harmonic Elimination (GA-SHE) techniques for asymmetric and symmetric topology of MLI is dealt with.
Abstract: Renewable energy sources such as fuel cell, solar, Magneto hydro Dynamic (MHD), geothermal are the best alternatives to solve the problem of environmental issue and increasing demand of energy. The output of these resources is dc, therefore to connect these resources to the grid, multilevel inverter is the key device. But the output of multilevel inverter has power quality issues such as harmonic generation and notching due to conversion of dc to ac and high number of switch. Hence, this paper deals with harmonic elimination using Genetic Algorithm based Selective Harmonic Elimination (GA-SHE) techniques for asymmetric and symmetric topology of MLI. In the present study, comparative study among various multilevel inverters with reduced number of switches topologies has been discussed. A novel topology of single phase 15-level inverter which consists least number of switches has been designed for a desired voltage level. Also, the comparison of Total harmonic distortion(THD) developed in the proposed 15-level inverter with output voltage generated by different topology at different levels are discussed. The output of proposed topology contains THD (<5%) as per IEEE 519 standard.

5 citations

Journal ArticleDOI
TL;DR: Harmony elimination using Genetic Algorithm based Selective Harmonic Elimination (GA-SHE) techniques for asymmetric and symmetric topology of MLI is dealt with.
Abstract: The demand of quality power is increasing continuously. The problem of global warming and rate of decrease of non-renewable energy sources are increasing day by day. Hence renewable energy sources such as fuel cell, solar, Magneto hydro Dynamic (MHD), geothermal are the best alternatives to solve the problem of environmental issue and increasing demand of energy. The output of these resources is dc, therefore to connect these resources to the grid, multilevel inverter is the key device. But the output of multilevel inverter has power quality issues such as harmonic generation and notching due to conversion of dc to ac and high number of switch. Hence, this paper deals with harmonic elimination using Genetic Algorithm based Selective Harmonic Elimination (GA-SHE) techniques for asymmetric and symmetric topology of MLI. In the present study, comparative study among the 5-level, 7-level, 9-level, 11-level and 15-level multilevel inverters with reduced number of switches topologies has been discussed. A novel topology of 15-level inverter which consists least number of switches has been designed for a desired voltage level. Also, the comparison of Total harmonic distortion developed in the output voltage generated by different topology at different levels with the proposed 15-level inverter topology are discussed.

3 citations

Proceedings ArticleDOI
01 Jul 2018
TL;DR: This paper presents a comparative analysis of four different topologies of an eleven level ELI based on criterion like total harmonic distortion (THD), complexity of the circuit and numbers of switching devices and components considering solar photo voltaic cells via boosters as input sources.
Abstract: This paper presents a comparative analysis of four different topologies of an eleven level inverter (ELI) based on criterion like total harmonic distortion (THD), complexity of the circuit and numbers of switching devices and components considering solar photo voltaic cells via boosters as input sources. The topologies considered are neutral point clamped or diode clamped type, flying capacitor type, cascaded H-bridge type and the reduced switch version of the cascaded H-bridge type. These configurations are modeled in MATLAB/simulink software environment for an eleven level inverter. Each switch of the single phase ELI is controlled by giving pulse with the help of PWM generator. The comparison results are presented and discussed.

1 citations

Proceedings ArticleDOI
01 Dec 2019
TL;DR: A 1-φ multi-level inverter configuration with the decreased number of switching components is recommended for distributed energy resource applications that has low power loss and reliable operation in case of switch failure.
Abstract: In this research paper, a 1-φ multi-level inverter configuration with the decreased number of switching components is recommended for distributed energy resource applications. The planned inverter able to generate seven and nine output voltage levels with symmetrical and asymmetrical source configuration. Due to the decreased number of semiconductor switches the topology has low power loss compared to conventional 7-level inverter. The developed topology has reliable operation in case of switch failure. The developed topology is simulated with the assistance of Matlab/Simulink software.