Recent success with the fabrication of high-performance GaN-on-Si high-voltage HFETs has made this technology a contender for power electronic applications. This paper discusses the properties of GaN that make it an attractive alternative to established silicon and emerging SiC power devices. Progress in development of vertical power devices from bulk GaN is reviewed followed by analysis of the prospects for GaN-on-Si HFET structures. Challenges and innovative solutions to creating enhancement-mode power switches are reviewed.

https://iopscience.iop.org/article/10.1088/0268-1242/28/7/074011/pdf

Gallium nitride devices for power electronic applications

In this paper, GaN power transistors on Si substrates for power switching application are reported. GaN heterojunction field-effect transistor (HFET) structure on Si is an important configuration in order to realize a low loss and high power devices as well as one of the cost-effective solutions. Current collapse phenomena are discussed for GaN-HFETs on Si substrate, resulting in suppression of the current collapse due to using the conducting Si substrate. Furthermore, attempts for normally off GaN-FETs were examined. A hybrid metal-oxide-semiconductor HFET structure is a promising candidate for obtaining devices with a lower on-resistance (Ron) and a high breakdown voltage (Vb).

GaN Power Transistors on Si Substrates for Switching Applications

In this paper, GaN power transistors on Si substrates for power switching application are reported. GaN heterojunction field-effect transistor (HFET) structure on Si is an important configuration in order to realize a low loss and high power devices as well as one of the cost-effective solutions. Current collapse phenomena are discussed for GaN-HFETs on Si substrate, resulting in suppression of the current collapse due to using the conducting Si substrate. Furthermore, attempts for normally off GaN-FETs were exam- ined. A hybrid metal-oxide-semiconductor HFET structure is a promising candidate for obtaining devices with a lower on-resistance ðRonÞ and a high breakdown voltage ðVbÞ.

GaN Power Transistors on Si Substrates for Switching Applications Hybrid MOS-FET transistor devices with low on-resistance, high hold-voltages and high breakdown voltage promise to provide high-power, low-loss operation for switching applications.

This letter reports normally-off operation of an AlGaN/GaN recessed MIS-gate heterostructure field-effect transistor with a high threshold voltage. The GaN-based recessed MIS-gate structure in conjunction with negative polarization charges under the gate allows us to achieve the high threshold voltage, whereas the low on-state resistance is maintained by the 2-D electron gas remaining in the channel except for the recessed MIS-gate region. The fabricated device exhibits a threshold voltage as high as 5.2 V with a maximum field-effect mobility of 120 cm2/Vmiddots, a maximum drain current of over 200 mA/mm, and a breakdown voltage of 400 V.

AlGaN/GaN Recessed MIS-Gate HFET With High-Threshold-Voltage Normally-Off Operation for Power Electronics Applications

An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

Method for Manufacturing Semiconductor Device

A novel method for fabricating trench structures on GaN was developed. A smooth non-polar (1100) plane was obtained by wet etching using tetramethylammonium hydroxide (TMAH) as the etchant. A U-shape trench with the (1100) plane side walls was formed with dry etching and the TMAH wet etching. A U-shape trench gate metal oxide semiconductor field-effect transistor (MOSFET) was also fabricated using the novel etching technology. This device has the excellent normally-off operation of drain current–gate voltage characteristics with the threshold voltage of 10 V. The drain breakdown voltage of 180 V was obtained. The results indicate that the trench gate structure can be applied to GaN-based transistors.

https://iopscience.iop.org/article/10.1143/APEX.1.021104/pdf

GaN-Based Trench Gate Metal Oxide Semiconductor Field-Effect Transistor Fabricated with Novel Wet Etching

We fabricated a vertical insulated gate AlGaN/GaN heterojunction field-effect transistor (HFET), using a free-standing GaN substrate. This HFET has apertures through which the electron current vertically flows. These apertures were formed by dry etching the p-GaN layer below the gate electrodes and regrowing n--GaN layer without mask. The HFET exhibited a specific on-resistance of as low as 2.6 mΩ·cm2 with a threshold voltage of -16 V. This HFET would be a prototype of a GaN-based high-power switching device.

https://iopscience.iop.org/article/10.1143/JJAP.46.L503/pdf

A Vertical Insulated Gate AlGaN/GaN Heterojunction Field-Effect Transistor

Disclosed is a semiconductor device including a lateral MOS element which comprises a p-type silicon substrate; a first semiconductor layer of an n-type constituting a drift region; a second semiconductor layer of the p-type selectively provided in the first semiconductor layer, and constituting a body region, in which a channel region is partially formed; a third semiconductor layer of the n-type selectively provided in a surface of the second semiconductor layer, and constituting a source region; a fourth semiconductor layer of the n-type provided in the first semiconductor layer, and constituting a drain region; and a trench gate. The trench gate is constructed such that a trench formed in the first semiconductor layer is filled with a gate electrode with an insulating film interposed therebetween. The trench gate is formed such that at least a bottom thereof is in contact with the semiconductor substrate. The semiconductor device of the present invention prevents a high electric field at a corner of the bottom of the trench gate, thus achieving its high breakdown voltage.

Semiconductor device including lateral MOS element

This paper presents a concept of silicon-on insulator lateral devices based on a reduced surface field (RESURF) principle by striped trench electrodes formed along the current flow direction. These trench electrodes reduce the electric field at the pn junctions sandwiched between the electrodes. We experimentally applied this RESURF technology to a conventional pn/sup -/ lateral diode. As a result, the breakdown voltage was increased from 56 to 104 V without varying the impurity concentration and the length of the n/sup -/ region. This means that the RESURF effect was achieved with the striped trench electrodes. The LDMOS with this RESURF technology was evaluated by simulations. This would be available for 80-V class lateral MOSFETs, used in the forthcoming 42-V automotive systems.

A concept of SOI RESURF lateral devices with striped trench electrodes

A vertical semiconductor device having an insulated gate structure makes use of a double-gate structure. The double-gate structure dramatically reduces the channel resistance, JFET resistance, and epitaxial resistance of the on-resistance of the power MOSFET, and implements an adequate breakdown voltage due to the effect of gate bias. In principle, a first gate and second gate having mutually facing portions are driven synchronously. This causes first and second channels to be formed in correspondence with first and second gates, and the currents flowing through these first and second channels form the on-current for this power device having a vertical structure.

Masahito Kodama

Papers

GaN-Based Trench Gate Metal Oxide Semiconductor Field-Effect Transistor Fabricated with Novel Wet Etching

A Vertical Insulated Gate AlGaN/GaN Heterojunction Field-Effect Transistor

Semiconductor device including lateral MOS element

A concept of SOI RESURF lateral devices with striped trench electrodes

Insulated gate semiconductor device and fabrication method therefor