Showing papers by "Massoud Pedram published in 2003"

Lifetime prediction routing in mobile ad hoc networks

Abstract: One of the main design constraints in mobile ad hoc networks (MANETs) is that they are power constrained. Hence, every effort is to be channeled towards reducing power. More precisely, network lifetime is a key design metric in MANETs. Since every node has to perform the functions of a router, if some nodes die early due to lack of energy, it will not be possible for other nodes to communicate with each other. Hence, the network will get disconnected and the network lifetime will be adversely affected. This paper presents a lifetime prediction routing protocol for MANETs that maximizes the network lifetime by finding routing solutions that minimize the variance of the remaining energies of the nodes in the network. Although this scheme introduces some additional traffic, simulations show that it improves the network lifetime by about 20-30%.

Ground bounce in digital VLSI circuits

Abstract: This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating the ground bounce is presented. The proposed method relies on accurate models of the short-channel MOS device and the chip-package interface parasitics. Next the effect of ground bounce on the propagation delay and the optimum tapering factor of a multistage buffer is discussed and a mathematical relationship for total propagation delay in the presence of the ground bounce is obtained. Effect of an on-chip decoupling capacitor on the ground bounce waveform and circuit speed is analyzed next and a closed form expression for the peak value of the differential-mode component of the ground bounce in terms of the on-chip decoupling capacitor is provided. Finally, a design methodology for controlling the switching times of the output drivers to minimize the ground bounce is presented.

Extending the lifetime of a network of battery-powered mobile devices by remote processing: a Markovian decision-based approach

Abstract: This paper addresses the problem of extending the lifetime of a battery-powered mobile host in a client-server wireless network by using task migration and remote processing. This problem is solved by first constructing a stochastic model of the client-server system based on the theory of continuous-time Markovian decision processes. Next the dynamic power management problem with task migration is formulated as a policy optimization problem and solved exactly by using a linear programming approach. Based on the off-line optimal policy derived in this way, an on-line adaptive policy is proposed, which dynamically monitors the channel conditions and the server behavior and adopts a client-side power management policy with task migration that results in optimum energy consumption in the client. Experimental results demonstrate that the proposed method outperforms existing heuristic methods by as much as 35% in terms of the overall energy savings.

Analysis of IR-drop scaling with implications for deep submicron P/G network designs

Abstract: This paper presents a detailed analysis of the power-supply voltage (IR) drop scaling in DSM technologies. For the first time, the effects of temperature, electromigration and interconnect technology scaling (including resistivity increase of Cu interconnects due to electron surface scattering and finite barrier thickness) are taken into consideration during this analysis. It is shown that the IR-drop effect in the power/ground (P/G) network increases rapidly with technology scaling, and using well-known counter measures such as wire-sizing and decoupling capacitor insertion with resource allocation schemes that are typically used in the present designs may not be sufficient to limit the voltage fluctuations over the power grid for future technologies. It is also shown that such voltage drops on power lines of switching devices in a clock network can introduce significant amount of skew which in turn degrades the signal integrity.

An Analytical Model for Predicting the Remaining Battery Capacity of Lithium-Ion Batteries

Abstract: Predicting the residual energy of the battery source that powers a portable electronic device is quite important in designing and employing an effective dynamic power management policy in the device. This paper presents a closed-form analytical model for predicting the remaining capacity of a lithium-ion battery. The proposed high-level model relies on online current and voltage measurements and, at the same time, correctly accounts for the temperature and cycle aging effects. The accuracy of the high-level model is validated by comparing our analytical model with the Dualfoil simulation results (under some simplifying assumptions), demonstrating 5% error between simulated and predicted data.

Energy-aware MPEG-4 FGS streaming

Abstract: In this paper, we propose an energy-aware MPEG-4 FGS video streaming system with client feedback. In this client-server system, the battery-powered mobile client sends its maximum decoding capability (i.e., its decoding aptitude) to the server in order to help the server determine the additional amount of data (in the form of enhancement layers on top of the base layer) per frame that it sends to the client, and thereby, set its data rate. On the client side, a dynamic voltage and frequency scaling technique is used to adjust the decoding aptitude of the client while meeting a constraint on the minimum achieved video quality. As a measure of energy efficiency of the video streamer, the notion of a normalized decoding load is introduced. It is shown that a video streaming system that maintains this normalized load at unity produces the optimum video quality with no energy waste. We implemented an MPEG-4 FGS video streaming system on an XScale-based testbed in which a server and a mobile client are wirelessly connected by a feedback channel. Based on the actual current measurements in this testbed, we obtain an average of 20% communication energy reduction in the client by making the MPEG-4 FGS streamer energy-aware.

Low power synthesis of finite state machines with mixed D and T flip-flops

Abstract: This paper presents a state assignment technique to reduce dynamic power consumption in finite state machines (FSM). The key idea is to decompose the state machine into a set of cycles that are collectively equivalent to the original FSM, and perform state assignment based on the cycle realization of the state machine using Gray codes. A new implementation of state machines by using a combination of D and T flip-flops is thereby proposed, which in conjunction with the proposed encoding algorithm, reduces power consumption by an average of 15%.

A fanout optimization algorithm based on the effort delay model

Abstract: This paper presents a Logical Effort-based fanout OPtimizer for ARea and Delay (LEOPARD), which relies on the availability of a (near) continuous size buffer library. Based on the concept of logical effort in very large scale integrated circuits, the proposed algorithm attempts to minimize the total buffer area under the required time and input capacitance constraints by constructing the fanout tree topology and assigning the buffer sizes. More precisely, the proposed algorithm produces the optimum fanout tree solution if the fanout tree topology is restricted to a chain of buffers. For the case where a discrete size library of buffers is available, this paper also presents a postprocessing (buffer merging) step that transforms the continuous buffer-sizing solution to a discrete one while minimizing the round-off error. Experimental results show that compared with previous approaches, both for continuous and discrete buffer libraries, LEOPARD achieves a significant reduction in the total buffer area subject to the required time constraints.

Technology mapping for low leakage power and high speed with hot-carrier effect consideration

Abstract: Leakage power and hot-carrier effects are emerging as key concerns in deep sub-micron CMOS technologies with respect to their effects on the total power dissipation and reliability of VLSI circuits. Leakage power dissipation is rapidly becoming a substantial contributor to the total power dissipation as threshold voltage becomes small. Similarly, the hot-carrier effect is one of the most significant failure mechanisms in high-density VLSI circuits. In this paper, a technology mapping technique is presented for use in reducing the leakage power dissipation of the circuit by utilizing a dual-threshold voltage cell library and for minimizing the aged delay of the circuit by considering the effect of hot carriers on the cell speeds as the circuit ages. In addition, this paper presents two methods to reduce delay during technology mapping: primary output ordering and pin permutation. Experimental results show that the total power dissipation and leakage power dissipation can be reduced by up to 27% and 52% as a result of the leakage-aware technology mapping and that the circuit aging phenomenon can be reduced by up to 10.6% as a result of hot-carrier-aware technology mapping. Delay was also reduced by up to 13% by using primary output ordering and pin permutation.

Energy-Aware Wireless Video Streaming.

Abstract: This paper presents a dynamic energy management policy for a wireless video streaming system, consisting of battery-powered client and server. The paper starts from the observation that the video quality in wireless streaming is a function of three factors: encoding aptitude of the server, decoding aptitude of the client, and the wireless channel. Based on this observation, the energy consumption of a wireless video streaming system is modeled and analyzed. Using the proposed model, the optimal energy assignment to each video frame is done such that the maximum system lifetime is achieved while satisfying a given minimum video quality requirement. Experimental results show that the proposed policy increases the system lifetime by 20%.

Leakage current reduction in sequential circuits by modifying the scan chains

Abstract: Input vector control is an effective technique for reducing the leakage current of combinational VLSI circuits when these circuits are in the sleep mode. In this paper a design technique for applying the minimum leakage input to a sequential circuit is proposed. Our method uses the built-in scan-chain in a VLSI circuit to drive it with the minimum leakage vector when it enters the sleep mode. Using these scan registers eliminates the area and delay overhead of the additional circuitry that would otherwise be needed to apply the minimum leakage vector to the circuit. We show how the proposed technique can be used for several different scan-chain architectures and present the experimental results on the MCNC91 benchmark circuits.

A Game Theoretic Approach to Dynamic Energy Minimization in Wireless Transceivers

Abstract: Adaptive transceivers can significantly reduce the energy consumption of a mobile, battery-powered node by capturing real-time changes in the communication channel. This paper proposes a game-theoretic solution to the optimization of the energy consumption in wireless transceivers. This is accomplished by dynamically adapting the modulation level of the transmitter modulator and the error correction aptitude of the receiver decoder with respect to channel conditions subject to specified average bit-error-rate and throughput constraints. Experimental results demonstrate energy savings of up to 15%.

Chromatic Encoding: A Low Power Encoding Technique for Digital Visual Interface

Abstract: This paper presents a low-power encoding technique, called chromatic encoding, for the Digital Visual Interface standard (DVI), a digital serial video interface. Chromatic encoding reduces power consumption by minimizing the transition counts on the DVI. This technique relies on the notion of tonal locality, i.e., the observation that the signal differences between adjacent pixels in images follow a Gaussian distribution. Based on this observation, an optimal code assignment is performed to minimize the transition counts. Furthermore, the three color channels of the DVI may be reciprocally encoded to achieve even more power saving. The idea is that given the signal values from the three color channels, one or two of these channels are encoded by reciprocal differences with a number of redundant bits used to indicate the selection. The proposed technique requires only three redundant bits for each 24-bit pixel. Experimental results show up to a 75% transition reduction.

Reducing transitions on address buses using instruction-set-aware system and method

Abstract: An instruction-set-aware method for reducing transitions on an irredundant address bus comprises receiving a first address for communication to a memory on an irredundant address bus. The method retrieves an instruction from a memory location indicated by the first address, transmits the instruction on a data bus, and determines a category of the instruction. The method predicts a second address based, at least in part, on the first address, the instruction, and the category of the instruction.

BEAM: bus encoding based on instruction-set-aware memories

Abstract: This paper introduces a new approach for minimizing power dissipation on the memory address bus. The proposed approach relies on the availability of smart memories that have certain awareness of the instruction format of one or more architectures. Based on this knowledge, the memory calculates or predicts the instruction and data addresses. Hence, not all addresses are sent from the processor to the memory. This, in turn, significantly reduces the activity on the memory bus. The proposed method can eliminate up to 97% of the transitions on the instruction address bus and 75% of the transitions on the data address bus with a small hardware overhead. The actual power savings of 85% for the instruction bus and 64% for the data bus were achieved for a per-line bus capacitance of 10 pF.

An energy-aware simulation model and transaction protocol for dynamic workload distribution in mobile ad hoc networks

Abstract: We introduce a network simulation model for detailed evaluation of the performance of different energy management policies in a MANET. In addition it presents an energy-aware network transaction protocol that dynamically redistributes the computational workload among a set of cooperative hosts within a MANET so as to improve network performance (network lifetime and service latency). Extensive simulation data and empirical results are presented and discussed.

Proceedings of the 2003 international symposium on Physical design

Abstract: This year's Symposium covers many important topics from timing and clocking to placement and partitioning to benchmarking and design planning. An outstanding set of technical papers has been selected for the program. All of these papers appear here in the paper and electronic versions of the proceedings. In addition, we will provide access to the foils presented at the conference for those authors who allow us to post them. You may check them out at our web site: www.ispd.cc.These papers are complemented by talks from invited speakers. We are delighted to have Raul Camposano as our keynote speaker. Dr. Camposano is Senior Vice President of Technology and Information Systems and the Chief Technical Officer of Synopsys. This year's symposium also includes several invited sessions from specialists in the field. Monday's keynote is followed by two talks on core placement and physical synthesis technology, one from IBM and one from Cadence. Later that afternoon, researchers from IBM and Intel will address ASIC design challenges and correct-by-construction design methodologies. Tuesday's invited talks are highlighted by, a Magma talk on a complete design for power methodology and flow for large ASICs and a session on the interactions between lithography and routing. Indeed, routing is hardly a solved problem; many challenges required for next-generation technologies remain. Finally, Wednesday is highlighted by several invited talks by experts from industry and academia who will present physical design and synthesis techniques targeted toward regular circuit fabrics.