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Massoud Pedram

Researcher at University of Southern California

Publications -  812
Citations -  25236

Massoud Pedram is an academic researcher from University of Southern California. The author has contributed to research in topics: Energy consumption & CMOS. The author has an hindex of 77, co-authored 780 publications receiving 23047 citations. Previous affiliations of Massoud Pedram include University of California, Berkeley & Syracuse University.

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Proceedings ArticleDOI

TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform

TL;DR: A new TEI-inspired SoC platform (called TIP), which relies on network-on-chip architecture (called µNoC) to realize system interconnects, which successfully reduces the total number and length of global wires.
Journal ArticleDOI

Reliability Enhancement of Inverter-Based Memristor Crossbar Neural Networks Using Mathematical Analysis of Circuit Non-Idealities

TL;DR: In this paper, the sensitivity of the neural network (NN) outputs to device parameter uncertainties (non-idealities) in inverter-based memristor ( IM) crossbar neuromorphic circuits is mathematically modeled and verified using exhaustive circuit and system-level simulations.
Proceedings ArticleDOI

qEC: A Logical Equivalence Checking Framework Targeting SFQ Superconducting Circuits

TL;DR: A framework for logical equivalence checking (LEC) ofSFQ circuits called qEC is proposed, built on the ABC tool however with the ability to check on properties of SFQ superconducting circuits, which shows a comparative verification time of Sport lab SFQ logic circuit benchmark suite.
Proceedings ArticleDOI

An empirical study of crosstalk in VDSM technologies

TL;DR: This work provides a first step toward the development of a new framework for timing analysis and test development in the presence of crosstalk events with respect to the skew between the input transition of aggressor and victim lines.
Proceedings ArticleDOI

A thermal stress-aware algorithm for power and temperature management of MPSoCs

TL;DR: The proposed thermal stress-aware algorithm, which uses a heuristic approach, controls the power consumption, maximum temperature, thermal cycles, and temporal/spatial thermal gradients of MPSoCs and may be applied to both the heterogeneous and homogenous MP soCs.