scispace - formally typeset
Search or ask a question
Author

Massoud Pedram

Bio: Massoud Pedram is an academic researcher from University of Southern California. The author has contributed to research in topics: Energy consumption & CMOS. The author has an hindex of 77, co-authored 780 publications receiving 23047 citations. Previous affiliations of Massoud Pedram include University of California, Berkeley & Syracuse University.


Papers
More filters
Book ChapterDOI
01 Jan 1998
TL;DR: Having provided a technique that provides an accurate power estimate on a node by node basis, a strong case is made for technology independent power optimization.
Abstract: This chapter presents a study on the relation between the power consumption of a Boolean network before and after technology mapping, under a zero delay model. Using a new signal tracing technique, it is shown that the structure of a network before mapping directly impacts the power consumption of the mapped network. This analysis will demonstrate that the contribution of each node in the unmapped network to the load and switching activity of the mapped network can accurately be estimated. Having provided a technique that provides an accurate power estimate on a node by node basis, a strong case is made for technology independent power optimization. Two load models for nodes in the technology independent network are also presented. These models will be used to minimize power consumption during technology independent power optimization procedures presented in the following chapters.
Proceedings ArticleDOI
TL;DR: In this article, a technique based on the sensitivity of the output to input waveform is presented for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise.
Abstract: A technique based on the sensitivity of the output to input waveform is presented for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise. Conventional STA tools represent a waveform by its arrival time and slope. However, this is not an accurate way of modeling the waveform for the purpose of noise analysis. The key contribution of our work is the development of a method that allows efficient propagation of equivalent waveforms throughout the circuit. Experimental results demonstrate higher accuracy of the proposed sensitivity-based gate delay propagation technique, SGDP, compared to the best of existing approaches. SGDP is compatible with the current level of gate characterization in conventional ASIC cell libraries, and as a result, it can be easily incorporated into commercial STA tools to improve their accuracy.
Journal ArticleDOI
TL;DR: TREBUCHET as discussed by the authors is a tile-based chip with highly parallel ALUs optimized for vectorized 128b modulo arithmetic for fully homomorphic encryption (FHE).
Abstract: Secure computation is of critical importance to not only the DoD, but across financial institutions, healthcare, and anywhere personally identifiable information (PII) is accessed. Traditional security techniques require data to be decrypted before performing any computation. When processed on untrusted systems the decrypted data is vulnerable to attacks to extract the sensitive information. To address these vulnerabilities Fully Homomorphic Encryption (FHE) keeps the data encrypted during computation and secures the results, even in these untrusted environments. However, FHE requires a significant amount of computation to perform equivalent unencrypted operations. To be useful, FHE must significantly close the computation gap (within 10x) to make encrypted processing practical. To accomplish this ambitious goal the TREBUCHET project is leading research and development in FHE processing hardware to accelerate deep computations on encrypted data, as part of the DARPA MTO Data Privacy for Virtual Environments (DPRIVE) program. We accelerate the major secure standardized FHE schemes (BGV, BFV, CKKS, FHEW, etc.) at>=128-bit security while integrating with the open-source PALISADE and OpenFHE libraries currently used in the DoD and in industry. We utilize a novel tile-based chip design with highly parallel ALUs optimized for vectorized 128b modulo arithmetic. The TREBUCHET coprocessor design provides a highly modular, flexible, and extensible FHE accelerator for easy reconfiguration, deployment, integration and application on other hardware form factors, such as System-on-Chip or alternate chip areas.
Book ChapterDOI
01 Jan 1998
TL;DR: Switching functions, described using two-valued Boolean algebra, are implemented using transistor circuits, which is a natural implementation for representing the primitive operations in a Boolean algebra.
Abstract: Boolean algebra is the primary mathematical tool used in designing the computing machines that have come into widespread use in the latter part of this century. Switching functions, described using two-valued Boolean algebra, are implemented using transistor circuits [4]. These transistors act as on-off switches, which is a natural implementation for representing the primitive operations in a Boolean algebra. Once the primitive operations of a Boolean algebra are implemented using transistor circuits, any Boolean function can be implemented using these primitive operations. Operations AND, OR and NOT form the primitive operations of Boolean algebra. Other variations of these primitive operations such and NAND and NOT can also be used as the set of primitive operations.
DOI
TL;DR: In this article , an area-oriented optimization method was proposed to improve the performance and area of RSFQ circuits, especially targeting circuits with feedback loops, where the path-balancing D-flip-flops were removed by capturing and repeating input patterns.
Abstract: Electronic design automation solutions are being developed to support the synthesis and physical design optimization of Rapid Single Flux Quantum (RSFQ) logic circuits with hundreds of thousands of logic cells. The clocked feature of synchronous RSFQ cells results in gate-level pipelined designs, requiring a large number of path-balancing D-flipflops (DFFs). In addition, one also faces the challenge of maintaining high throughput for RSFQ circuits containing feedback loops. To enforce the coincidence of the input and feedback patterns, one can apply a new input pattern every $L$ cycles, where $L$ is the length of the feedback loop. Consequently, the throughput of circuits with feedback loops is only $1/L$ of the clock frequency. In this paper, we present two methods to improve the performance and area of RSFQ circuits, especially targeting circuits with feedback loops: (i) An area-oriented optimization method that removes the path-balancing DFFs by capturing and repeating input patterns. (ii) A throughput-oriented optimization method that enables an RSFQ circuit to receive and correctly process an input pattern every clock cycle. For a large circuit such as S526 in the ISCAS89 benchmark circuits, the circuit can initially receive an input pattern only every 9 cycles. As a result of applying our area-oriented optimization, the circuit admits 33% fewer logic cells while receiving input patterns every 11 cycles. Alternatively, our throughput-oriented optimization yields a circuit that can receive new input patterns on every cycle with nearly the same cell count.

Cited by
More filters
Journal ArticleDOI

[...]

08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

Journal ArticleDOI
TL;DR: Machine learning addresses many of the same research questions as the fields of statistics, data mining, and psychology, but with differences of emphasis.
Abstract: Machine Learning is the study of methods for programming computers to learn. Computers are applied to a wide range of tasks, and for most of these it is relatively easy for programmers to design and implement the necessary software. However, there are many tasks for which this is difficult or impossible. These can be divided into four general categories. First, there are problems for which there exist no human experts. For example, in modern automated manufacturing facilities, there is a need to predict machine failures before they occur by analyzing sensor readings. Because the machines are new, there are no human experts who can be interviewed by a programmer to provide the knowledge necessary to build a computer system. A machine learning system can study recorded data and subsequent machine failures and learn prediction rules. Second, there are problems where human experts exist, but where they are unable to explain their expertise. This is the case in many perceptual tasks, such as speech recognition, hand-writing recognition, and natural language understanding. Virtually all humans exhibit expert-level abilities on these tasks, but none of them can describe the detailed steps that they follow as they perform them. Fortunately, humans can provide machines with examples of the inputs and correct outputs for these tasks, so machine learning algorithms can learn to map the inputs to the outputs. Third, there are problems where phenomena are changing rapidly. In finance, for example, people would like to predict the future behavior of the stock market, of consumer purchases, or of exchange rates. These behaviors change frequently, so that even if a programmer could construct a good predictive computer program, it would need to be rewritten frequently. A learning program can relieve the programmer of this burden by constantly modifying and tuning a set of learned prediction rules. Fourth, there are applications that need to be customized for each computer user separately. Consider, for example, a program to filter unwanted electronic mail messages. Different users will need different filters. It is unreasonable to expect each user to program his or her own rules, and it is infeasible to provide every user with a software engineer to keep the rules up-to-date. A machine learning system can learn which mail messages the user rejects and maintain the filtering rules automatically. Machine learning addresses many of the same research questions as the fields of statistics, data mining, and psychology, but with differences of emphasis. Statistics focuses on understanding the phenomena that have generated the data, often with the goal of testing different hypotheses about those phenomena. Data mining seeks to find patterns in the data that are understandable by people. Psychological studies of human learning aspire to understand the mechanisms underlying the various learning behaviors exhibited by people (concept learning, skill acquisition, strategy change, etc.).

13,246 citations

Christopher M. Bishop1
01 Jan 2006
TL;DR: Probability distributions of linear models for regression and classification are given in this article, along with a discussion of combining models and combining models in the context of machine learning and classification.
Abstract: Probability Distributions.- Linear Models for Regression.- Linear Models for Classification.- Neural Networks.- Kernel Methods.- Sparse Kernel Machines.- Graphical Models.- Mixture Models and EM.- Approximate Inference.- Sampling Methods.- Continuous Latent Variables.- Sequential Data.- Combining Models.

10,141 citations