Massoud Pedram

TL;DR: This paper presents an energy-efficient, yet high-speed approximate maximally redundant signed digit (MRSD) multiplier (called AMR-MUL) based on a parallel structure, and suggests several approximate Full-Adder reduction cells with average positive and negative errors obtained by simplifying the structure of an exact FA cell.

TL;DR: In this paper, an optimization framework is introduced to determine the energy price for utility companies in an oligopolistic energy market, where each utility company will announce the time-of-use dependent pricing policy during the billing period, and each energy consumer will subsequently choose a utility company for energy supply to minimize the expected energy cost.

TL;DR: An innovative post-routing optimization framework is developed in which the longest wire is ripped and re-routed by resorting to a maze routing algorithm after the acquisition of wire density distribution using a machine learning method.

TL;DR: Low power VLSI design can be achieved at various levels of the design abstraction from algorithmic and system levels down to layout and circuit levels, but power has to be considered during logic synthesis and optimization.

TL;DR: In this article , an equivalence checking framework targeting sequential circuits mapped to rapid superconducting single-fluxquantum (RSFQ) logic circuits is presented. But it faces challenges in emerging technologies due to differences between its logic models and those of the standard complementary metal oxide semiconductor (CMOS).