scispace - formally typeset
Search or ask a question

Showing papers by "Matteo Sonza Reorda published in 1990"


Book ChapterDOI
18 Jun 1990
TL;DR: This paper shows how a test pattern may be generated while trying to disprove the equivalence of a good and a faulty machine, derived from Graph Theory and Model Checking.
Abstract: Some design environments may prevent Design for Testability techniques from reducing testing to a combinational problem: ATPG for sequential devices remains a challenging field. Random and deterministic structure-oriented techniques are the state-of-the-art, but there is a growing interest in methods where the function implemented by the circuit is known. This paper shows how a test pattern may be generated while trying to disprove the equivalence of a good and a faulty machine. The algorithms are derived from Graph Theory and Model Checking. An example is analyzed to discuss the applicability and the cost of such an approach.

3 citations