Showing papers by "Matteo Sonza Reorda published in 1992"

Boolean function manipulation on massively parallel computers

Abstract: A new algorithm for implementing the basic operations on BDDs (binary decision diagrams) on a massively parallel computer is presented. Each node is associated with a processor, and nodes belonging to the same level are evaluated together. An implementation of the algorithm on a Connection Machine CM2 has been done, and the prototype is being tested on a set of benchmark applications. Experimental results, showing the time required to perform the apply operation on BDDs of growing size demonstrate the exactness of the complexity analysis and the effectiveness of the approach. >

Sequential circuit diagnosis based on formal verification techniques

Abstract: This paper‘ deals with the generation of diagnostic test sequences for real-size synchronous sequential circuits. A modified fault simulator is used for assessing the diagnostic power of existing detection-oriented test patterns and a diagnostic procedure for generating new ones is described. The diagnostic procedure successfully exploits symbolic FSM equivalence proof algorithms. In order to resort to product machine traversal only when really needed, special checks are perfo:rrned to verify combinational identity and identity on rt:achable states. As all faults are attributed to their equivalence class, this method may be used to build a complete and exact diagnostic tree. Experimental results on ISCAS’89 circuits show the feasibility of the’ approach ’.

Improved techniques for multiple stuck-at fault analysis using single stuck-at fault test sets

Abstract: Previous studies have suggested that many multiple stuck-at faults are detected by the test patterns generated to detect single stuck-at faults, but a fault simulation is often impossible, as their number grows and becomes enormous as real-sized circuits are considered. Thus, rules are needed to decrease their number by neglecting those that are surely detected by the patterns generated for single stuck-ats. A procedure is first given for establishing whether a multiple stuck-at fault is detected by a pattern. Then this procedure is used to prove a set of rules that allows the size of the fault list to be decreased significantly. Experimental results on the standard set of combinational benchmark circuits are provided, showing the effectiveness of the approach. >