Matthias Wietstruck

Bio: Matthias Wietstruck is an academic researcher from Leibniz Institute for Neurobiology. The author has contributed to research in topics: BiCMOS & Wafer. The author has an hindex of 11, co-authored 77 publications receiving 412 citations. Previous affiliations of Matthias Wietstruck include Technical University of Berlin.

Wafer-Scale Fabrication of Recessed-Channel PtSe 2 MOSFETs With Low Contact Resistance and Improved Gate Control

Abstract: Wafer-scale fabrication of PtSe2 MOSFETs was demonstrated by photolithography on Pt films directly selenized at 400 °C. Taking advantage of the unique property of PtSe2 to transition from a semiconductor to a semimetal as its thickness increases beyond a few monolayers, channel recess was adapted for improving gate control while keeping the contact resistance below 0.01 $\Omega \cdot \text {cm}$ . The wafer-scale fabrication resulted in uniform device characteristics so that average instead of best results was reported. For example, the drain currents at ${V}_{\text {GS}} = -10$ V, ${V}_{\text {DS}} = -1$ V were $25~\pm ~5$ , 57 ± 8, and $618~\pm ~17~\mu \text{A}/\mu \text{m}$ for 4-, 8-, and 12-nm-thick PtSe2, respectively. The corresponding peak transconductances were 0.20 ± 0.1, 0.60 ± 0.05, and $1.4~\pm ~0.1~\mu \text{S}/\mu \text{m}$ . The forward-current cutoff frequency of 12-nm-thick PtSe2 MOSFETs was 42 ± 5 MHz, whereas the corresponding frequency of maximum oscillation was 180 ± 30 MHz. These results confirmed the application potential of PtSe2 for future-generation thin-film transistors.

BiCMOS embedded RF-MEMS switch for above 90 GHz applications using backside integration technique

Abstract: We demonstrate a novel back-side processed, back to front self-aligned BiCMOS embedded RF-MEMS switch for the 90 to 140GHz frequency band. The switch integration is very simple, adding only one mask step to the underlying high-performance BiCMOS process. Moreover, it offers low cost, wafer level packaging. The insertion loss of the switch is less than 0.5dB up to 140GHz, and isolation is better than 15dB in the frequency range of 90 to 140GHz. The switch-on time is measured as 10µs. No performance degradation was observed after 5 billion cold switching cycles demonstrating the high reliability of the switch. An on-chip charge-pump (CP) circuit is realized using enhanced PMOS transistor to excite the switch with an output voltage of up to 50V and a rise time of 2µs.

D–Band RF–MEMS SPDT Switch in a $0.13~\mu$ m SiGe BiCMOS Technology

Abstract: This letter presents a D–Band (110–170 GHz) RF–MEMS based Single–Pole Double–Throw (SPDT) switch fabricated in a $0.13~\mu \text {m}$ SiGe BiCMOS technology. The on–wafer S–parameter measurements of the RF–MEMS based SPDT switch show beyond state of the art RF performances, 1.42 dB insertion loss and 54.5 dB isolation at 140 GHz. The SPDT switch consists of a tee junction connected to two Single–Pole Single–Throw (SPST) RF–MEMS switches. The RF–MEMS switch is actuated using 60 V actuation voltage and provides less than $10~\mu \text {s}$ switch–on and switch–off times. To the best of the authors’ knowledge, the results achieved in this study are the lowest insertion loss and the highest isolation of a SPDT reported in D–band.

Development of a Multi-project Fan-Out Wafer Level Packaging Platform

Abstract: Fan-Out Wafer Level Packaging (FOWLP) is one of the latest trends in microelectronics packaging. FOWLP has a high potential in significant package miniaturization concerning package volume but also in thickness. Main advantages of FOWLP are the substrate-less package, low thermal resistance, high RF performance due to shorter interconnects together, as the direct IC connection by thin film metallization instead of wire bonds or flip chip bumps yields low parasitic effects. Especially inductance of FOWLP is much lower compared to FC-BGA packages. In addition the redistribution layer can also integrate embedded passives (R, L, C) as well as antenna structures using a multi-layer structure. It can be used for multi-chip packages for System in Package (SiP) and heterogeneous integration. Hence, technology is well suited for RF applications. FOWLP is in volume manufacturing since a couple of years and services are offered in Asia as well as in Europe. But especially for low volume quantities and prototyping no dedicated packaging services are available. Adapting the success story of Si-based Multi-Project Wafer technology that offers fast and cost-effective access to low numbers of chips, Multi-Project Fan-out Wafer Level Packaging might be an option to address heterogeneous integration for the prototyping market. Within this study such a Multi-Project Fan-out Wafer Level Package (MPFOWLP) technology has been developed and evaluated with focus on RF applications. To demonstrate an entire prototyping run Si dies from a Multi-Project Wafer were used. For technology evaluation six different chips have been selected where five of them were functional dies for application frequencies up to 120 GHz. Additionally one dedicated test die was used, allowing on the one hand RF characterization of the technology approach and on the other hand interconnect testing and reliability characterization. A uniform package size of 10 × 10 mm2 was chosen and design rules for the redistribution layer (RDL) have been fixed at the beginning. A two metal layer design and a BGA pin-out have been chosen allowing also the integration of antenna structures in the RDL. Based on these boundary conditions package designs have been done. Reticle and fan-out wafer design were integrated on a 200 mm reconfigured wafer. Based on this approach around 38 packages of each type come out of one wafer. Packaging technology followed the RDL last approach, where dies are first embedded into mold compound forming a reconfigured wafer and subsequently a thin film redistribution layer is applied to the reconfigured wafer. Final process steps are solder ball placement and package singulation by dicing. In summary this paper describes the development and evaluation run of a Multi-Project Fan-out Wafer Level Package approach for RF application.

Packaged BiCMOS embedded RF-MEMS switches with integrated inductive loads

Abstract: This paper presents packaged BiCMOS embedded RF-MEMS switches with integrated inductive loads for frequency tuning at mm-wave frequencies. The developed technique provides easy optimization to maximize the RF performance at the desired frequency without having an effect on the switch mechanics. Insertion loss less than 0.25 dB and isolation better than 20 dB are achieved from 30 to 100 GHz. A glass cap with a silicon frame is used to package the switch. Single-pole-double-throw (SPDT) switches and a 24 – 77 GHz reconfigurable LNA is also demonstrated as a first time implementation of single chip BiCMOS reconfigurable circuit at such high frequencies.

Raman Characterization of Platinum Diselenide Thin Films

Abstract: Platinum diselenide (PtSe2) is a newly discovered 2D material which is of great interest for applications in electronics and catalysis. PtSe2 films were synthesized by thermally-assisted selenization of predeposited platinum films and scanning transmission electron microscopy revealed the crystal structure of these films to be 1T. Raman scattering of these films was studied as a function of film thickness, laser wavelength and laser polarization. Eg and A1g Raman active modes were identified using polarization measurements in the Raman setup. These modes were found to display a clear position and intensity dependence with film thickness, for multiple excitation wavelengths, and their peak positions agree with simulated phonon dispersion curves for PtSe2. These results highlight the practicality of using Raman spectroscopy as a prime characterization technique for newly-synthesized 2D materials.

Optical Biosensors Based on Silicon-On-Insulator Ring Resonators: A Review

Abstract: Recent developments in optical biosensors based on integrated photonic devices are reviewed with a special emphasis on silicon-on-insulator ring resonators. The review is mainly devoted to the following aspects: (1) Principles of sensing mechanism, (2) sensor design, (3) biofunctionalization procedures for specific molecule detection and (4) system integration and measurement set-ups. The inherent challenges of implementing photonics-based biosensors to meet specific requirements of applications in medicine, food analysis, and environmental monitoring are discussed.

RF MEMS-CMOS Device Integration: An Overview of the Potential for RF Researchers

Abstract: Over the past decades, a great deal of progress has been made in the development of semiconductor manufacturing processes. This in turn has made possible the monolithic integration of microelectromechanical systems (MEMS) devices with driving, controlling, and signal processing CMOS electronics [1][4]. There have been several successful well known commercial examples of integrated MEMS-CMOS devices, including the Analog Devices ADXL accelerometers [5], the Texas Instruments digital micromirror device (DMD) [6], the STMicroelectronics accelerometers and gyroscopes [6], and SiTime vacuum-encapsulated resonators [7]. More recently, Cavendish Kinetic [8] and WiSpry [9] launched their RF MEMS switches fabricated through MEMS-CMOS integration. While several techniques for MEMS-CMOS integrations have been widely employed for sensor and accelerometer applications, most of the work reported in literatures on RF MEMS has focused on devices fabricated using conventional surface micromachining techniques. It is the objective of this article to provide RF researchers with an overview of the potential of integrating MEMS with CMOS for RF MEMS applications.

Quantum confinement-induced semimetal-to-semiconductor evolution in large-area ultra-thin PtSe2 films grown at 400 °C

Abstract: In this work, we present a comprehensive theoretical and experimental study of quantum confinement in layered platinum diselenide (PtSe2) films as a function of film thickness. Our electrical measurements, in combination with density functional theory calculations, show distinct layer-dependent semimetal-to-semiconductor evolution in PtSe2 films, and highlight the importance of including van der Waals interactions, Green’s function calibration, and screened Coulomb interactions in the determination of the thickness-dependent PtSe2 energy gap. Large-area PtSe2 films of varying thickness (2.5–6.5 nm) were formed at 400 °C by thermally assisted conversion of ultra-thin platinum films on Si/SiO2 substrates. The PtSe2 films exhibit p-type semiconducting behavior with hole mobility values up to 13 cm2/V·s. Metal-oxide-semiconductor field-effect transistors have been fabricated using the grown PtSe2 films and a gate field-controlled switching performance with an ION/IOFF ratio of >230 has been measured at room temperature for a 2.5–3 nm PtSe2 film, while the ratio drops to <2 for 5–6.5 nm-thick PtSe2 films, consistent with a semiconducting-to-semimetallic transition with increasing PtSe2 film thickness. These experimental observations indicate that the low-temperature growth of semimetallic or semiconducting PtSe2 could be integrated into the back-end-of-line of a silicon complementary metal-oxide-semiconductor process.