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Md. Shamsujjoha

Researcher at Monash University

Publications -  18
Citations -  136

Md. Shamsujjoha is an academic researcher from Monash University. The author has contributed to research in topics: Logic synthesis & User experience design. The author has an hindex of 5, co-authored 18 publications receiving 81 citations. Previous affiliations of Md. Shamsujjoha include University of Dhaka & East West University.

Papers
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Proceedings ArticleDOI

A Low Power Fault Tolerant Reversible Decoder Using MOS Transistors

TL;DR: Results show that the proposed design of the n-to-2n decoder is much better in terms of quantum cost, delay, hardware complexity and has significantly better scalability than the existing approach.
Proceedings ArticleDOI

An Improved Approach for Detection of Diabetic Retinopathy Using Feature Importance and Machine Learning Algorithms

TL;DR: The proposed method achieves a better score in precision and recall which are 97% and 92%, respectively compared to the existing result 72% and 63%, i.e., more the 25% in each category on average which proves the enormousness of the proposed method.
Proceedings ArticleDOI

Leukemia Prediction from Microscopic Images of Human Blood Cell Using HOG Feature Descriptor and Logistic Regression

TL;DR: A scalable Leukemia prediction method based on a publicly available ALL_IDB dataset using the HOG feature descriptor and Logistic Regression and the maximum average accuracy of the proposed model is 96% which is much higher than the state-of-the-art schemes.
Book ChapterDOI

Transfer Learning and Supervised Classifier Based Prediction Model for Breast Cancer

TL;DR: A machine learning model is proposed to automate the classification of benign and malignant tissue images in breast cancer histopathology images, which could help to decrease the mortality rate by making diagnosis less time consuming and more accurate.
Journal ArticleDOI

Design of a compact reversible fault tolerant field programmable gate array: A novel approach in reversible logic synthesis

TL;DR: The comparative results show that the proposed design of the FPGA is much better in terms of gate count, garbage outputs, quantum cost, delay, and hardware complexity than the existing approaches.