From the Publisher:
This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.

Algorithms for VLSI Physical Design Automation

The current status of VLSI layout and directions for future research are addressed, with emphasis on the authors' own work Necessary terminology and definitions and, whenever possible, a precise formulation of the problems are provided Placement and floorplanning for both the sea-of-gates and building-block designs are examined The former emphasizes the connectivity specification, whereas the latter must also consider module shape and size Global routing based on a method of successive cuts on a chip is discussed This is a hierarchical top-down approach that is useful for both of the above designs A two-dimensional detailed routing problem and the rip-up and rerouting problem are also discussed The field of computational geometry and its application to layout-in particular, to gridless routing and compaction-are reviewed, and layout engines are considered >

Recent advances in VLSI layout

In this paper we present two n-layer channel routing algorithms that guarantee successful routing of the channel for n greater than three. The first is linear and optimal given a VHV...HV assignment of layers. The second, using an HVH...VH layer assignment, is quasilinear and performs optimally on examples from the literature. Except in pathological cases, we expect the latter router to perform within one row of optimal. For comparison with published examples we implemented the second router in five and three layers. The five-layer implementation routed all examples optimally while the three-layer implementation routed the examples with the same or fewer rows than the published examples. With its n-layer capability this channel router will allow channel routing to be used when more than three layers are available. This router can also be used to evaluate the utility of additional layers.

Near-Optimal n-Layer Channel Routing

For the macro-cell design style and for routing problems where the routing regions are irregular, two dimensional routers are often necessary. In this paper a new routing technique that can be applied for general two-layer detailed routing problems including switch boxes, channels and partially routed areas, is presented. The routing regions that can be handled are very general: the boundaries can be described by any rectilinear chains and the pins can be on the boundaries of the region or inside it, the obstructions can be of any shape and size. The technique is based on an algorithm that routes incrementally and intelligently the nets in the routing region and allows modifications and rip-up of nets that may impede the complete routing of other nets. The modification steps (also called weak modification) push some segments of nets already routed to make room for a blocked net. The rip-up and re-route steps (called strong modification), remove segments of nets already routed to make room for a blocked connection and is invoked only if weak modification fails. The algorithm is rigorously proven to complete in finite time and its complexity is analyzed. Many test cases have been run and on all the examples known in the literature the router has performed as well or better than existing algorithms. In particular, the Burstein's difficult switch box example has been routed using one less column than the original data. In addition, the router has routed difficult channels such as Deutsch's in density and has performed better than or as well as YACR-II in all the channels available to us. REFERENCES

Mighty: a rip-up and reroute detailed router

"Constrained via minimization with practical considerations for multi-layer VLSI/PCB routing problems," pp. 61-69, Proc. IEEE/ACM 28th Design Automation Conf.

With the advent of VLSI technology, multiple-layer routing becomes feasible. Two special types of three-layer channel routing, VHV and HVH, are introduced in this paper. The merging algorithm and the left edge algorithm used in two-layer routing can be extended to three layers. Attempts are made to compare the lower bounds of channel width of three types of routing--two-layer, VHV, and HVH. The algorithms were coded in PASCAL and implemented on VAX 11/780 computer. The computational results are satisfactory, since all the results lead to a further reduction in routing area.

Mei Lun Liu

Papers

Three-Layer Channel Routing