Michael A. Gaynes

TL;DR: In this article, the authors describe chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors there through, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and possibly with or during metallisation of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack.

TL;DR: In this paper, the authors describe a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors, which is able to cool chips with average power densities of 400W/cm2 or more.

TL;DR: In this paper, a stencil is produced with holes passing through it in an arrangement corresponding to an arrangement of conductive pads on a substrate or integrated circuit, which is made of a solder reflow compatible material.

TL;DR: In this paper, the authors summarized the concept design and hardware build efforts as part of a US Department of Energy cost shared grant, two year project (2010-2012) that was undertaken to develop highly energy efficient, warm liquid cooled servers for use in chiller-less data centers.

TL;DR: A simple process for card assembly by Direct Chip Attachment (DCA) uses electrically conductive adhesives as discussed by the authors, where chips are attached to chip carriers with conductive pads which match the conductive thermoplastic bumps.