Michael G. Amaro

Bio: Michael G. Amaro is an academic researcher from Texas Instruments. The author has contributed to research in topics: Node (circuits) & Buck converter. The author has an hindex of 8, co-authored 19 publications receiving 269 citations.

Comparison of a Buck Converter and a Series Capacitor Buck Converter for High-Frequency, High-Conversion-Ratio Voltage Regulators

Abstract: This paper presents an analytical and experimental comparison of a two-phase buck converter and a two-phase, series capacitor buck converter. The limitations of a conventional buck converter in high-current (10 A or more), and high-frequency (HF, 3–30 MHz) point-of-load voltage regulators with large voltage conversion ratios (10-to-1) are highlighted. The series capacitor buck converter exhibits desirable characteristics at HF, including lower switching loss, less inductor current ripple, automatic phase current balancing, duty ratio extension, and soft charging of the energy transfer capacitor. Analysis of the topologies indicates that switching loss and inductor core loss can dominate at HF. Results from side-by-side 12 V input, 1.2 V output hardware prototypes demonstrate that the series capacitor buck converter has up to 12 percentage points higher efficiency at 3 MHz and reduces power loss by up to 33% at full load (10 A). Some guidelines for inductor selection are provided, and a switch stress comparison reveals that the maximum converter switch stress is reduced by 30%.

Parallel path power supply

Abstract: A power conversion architecture includes one control capable of simultaneous operation with multiple power conversion circuits. The function of the controlling mechanism includes an output signal proportional to one or more inputs to the controlling mechanism for the purpose of maintaining a destination level at a substantially constant value. The function of each power conversion path is to transfer power from a source to a destination in an amount dictated by the controlling mechanism. The function of the parallel power conversion architecture is to proportionally distribute the power transfer between all power conversion paths.

Digitally synthesized multiple phase pulse width modulation

Abstract: A DC to DC converter includes multiple stages to share power handling. The stages are connected in parallel paths between the source input and the load output of the power converter. An analog error signal is generated by comparing the load output signal to a reference signal. The error signal is fed to a phase shifting input of a phase lock loop. The phase lock loop is connected to receive a reference clock signal and maintain a relative clock signal shifted in phase from the reference clock signal by an amount depending on the error signal. Digital divider circuits and digital logic circuits are used to produce phase shifted variable pulse width control signals for the stages. The parallel connected power conversion stages equally share the transfer of power from the input source to an output load. A single analog to digital conversion of a single analog error signal to multiple, phase shifted, variable duty cycle clocks is provided.

Switched reference mosfet drive assist circuit

Abstract: A power converter includes at least a first phase including a high-side MOSFET transistor (HSA) and a low-side (LS) MOSFET transistor (LSA) driving a first output inductor. The first phase further includes an active gate drive assist circuit including first MOSFET switch (first switch) and second MOSFET switch (second switch) positioned in series between a source of HSA and a drain of LSA. A capacitor (CS) is between the source of HSA and drain of LSA. A bootstrap capacitor (CA) having a reference terminal is connected to a node between the first switch and the second switch.

Series-capacitor buck converter multiphase controller

Abstract: A series-capacitor adaptively switched power conversion system includes, for example, a series-capacitor buck converter overlapping controller. The series-capacitor buck converter overlapping controller is arranged to provide reduced switching losses and improved system efficiency while the switched power conversion system is operating in a discontinuous conduction mode (DCM). While operating in the DCM, the series-capacitor buck converter overlapping controller generates precisely controlled frequency modulated waveforms that are adapted to independently drive control switches of one or more power converters. The series-capacitor buck converter overlapping controller is arranged to reduce (or eliminate) negative inductor current (and the associated conduction loss) that can be present in multiphase (two or more phases) series-capacitor buck converters.

Multi-level conversion : high voltage choppers and voltage-source inverters

Abstract: The authors discuss high-voltage power conversion. Conventional series connection and three-level voltage source inverter techniques are reviewed and compared. A novel versatile multilevel commutation cell is introduced: it is shown that this topology is safer and more simple to control, and delivers purer output waveforms. The authors show how this technique can be applied to either choppers or voltage-source inverters and generalized to any number of switches.<>

Power converter circuitry and method

Abstract: A control system and method for simultaneously regulating the operation of a plurality of different types of switching power converters. The system utilizes in regulating the power converters sampled data and nonlinear feedback control loops.

Method and system for communicating filter compensation coefficients for a digital power control system

Abstract: A method and system is provided for programming the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. The distributed power system comprises a plurality of point-of-load (POL) regulators each comprising at least one power switch adapted to convey power to a load and a digital controller adapted to control operation of the power switch responsive to a feedback measurement. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. A serial data bus operatively connects each of the plurality of POL regulators. A system controller is connected to the serial data bus and is adapted to communicate digital data to the plurality of POL regulators via the serial data bus. The digital data includes programming data for programming the plural filter coefficients. The system controller further comprises a user interface adapted to receive the programming data therefrom.

Protective enclosure for electronic device

Abstract: A protective cover for an electronic device that has an interactive control panel and one or more electrical contacts includes a protective shell having first member and a second member. The second member is configured to join with the first case member to at least partially cover the electronic device. An aperture defined by the protective shell is aligned with the interactive control panel when the electronic device is at least partially enclosed by the protective shell. A securing mechanism secures the first member with the second member. An electrical connection attached to the protective shell is configured to connect an electrical source to at least one of the electrical contacts of the electronic device to provide an electrical connection to the electrical source when the electronic device is received by the first member.

Multiple phase switching regulators with stage shedding

Abstract: Multiple phase switching regulators with stage shedding are provided. Multiple phase switching regulators of the present invention have a plurality of single phase switching regulators coupled in parallel to an output capacitor. The plurality of single phase switching regulators supply current to a load at a regulated voltage. A comparator monitors the load current and causes one or more of the single phase switching regulators to be OFF at a low load current threshold. At least one of the single phase switching regulators that remains ON increases its output current so that the multiple phase switching regulator output current continues to match the load current. The present invention may include a second comparator that causes additional single phase switching regulators to be OFF at a second low load current threshold that is lower than the first low load current threshold.