M
Michael H. Perrott
Researcher at InvenSense
Publications - 120
Citations - 5909
Michael H. Perrott is an academic researcher from InvenSense. The author has contributed to research in topics: Phase-locked loop & Jitter. The author has an hindex of 36, co-authored 119 publications receiving 5652 citations. Previous affiliations of Michael H. Perrott include Silicon Labs & Masdar Institute of Science and Technology.
Papers
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Journal ArticleDOI
A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation
TL;DR: A digital compensation method and key circuits are presented that allow fractional-N synthesizers to be modulated at data rates greatly exceeding their bandwidth and indicate that it meets performance requirements of the digital enhanced cordless telecommunications (DECT) standard.
Journal ArticleDOI
Photonic ADC: overcoming the bottleneck of electronic jitter.
Anatol Khilo,Steven J. Spector,Matthew E. Grein,Amir H. Nejadmalayeri,C.W. Holzwarth,Michelle Y. Sander,Marcus S. Dahlem,Michael Y. Peng,Michael W. Geis,Nicole DiLello,Jung U. Yoon,Ali R. Motamedi,Jason S. Orcutt,J. P. Wang,Cheryl Sorace-Agaskar,Milos A. Popovic,Jie Sun,G.-R. Zhou,Hyunil Byun,Jian Chen,Judy L. Hoyt,Henry I. Smith,Rajeev J. Ram,Michael H. Perrott,Theodore M. Lyszczarz,Erich P. Ippen,Franz X. Kärtner +26 more
TL;DR: This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits using a photonic ADC built from discrete components, a 4-5 times improvement over the performance of the best electronic ADCs which exist today.
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A 12-Bit, 10-MHz Bandwidth, Continuous-Time $\Sigma\Delta$ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer
M.Z. Straayer,Michael H. Perrott +1 more
TL;DR: The use of VCO-based quantization within continuous-time (CT) SigmaDelta analog-to-digital converter (ADC) structures is explored, with a custom prototype in 0.13 mum CMOS showing measured performance of 86/72 dB SNR/SNDR with 10 MHz bandwidth.
Journal ArticleDOI
A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping
M.Z. Straayer,Michael H. Perrott +1 more
TL;DR: An 11-bit, 50-MS/s time-to-digital converter (TDC) using a multipath gated ring oscillator with 6 ps of effective delay per stage demonstrates 1st-order noise shaping.
Journal ArticleDOI
A Low-Noise Wide-BW 3.6-GHz Digital $\Delta\Sigma$ Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation
TL;DR: A 3.6-GHz digital fractional-N frequency synthesizer achieving low noise and 500-kHz bandwidth is presented, which uses a gated-ring-oscillator time-to-digital converter to achieve integrated phase noise of less than 300 fs.