Michiel A. P. Pertijs

Bio: Michiel A. P. Pertijs is an academic researcher from Delft University of Technology. The author has contributed to research in topics: Transducer & CMOS. The author has an hindex of 25, co-authored 143 publications receiving 2424 citations. Previous affiliations of Michiel A. P. Pertijs include Philips & Katholieke Universiteit Leuven.

A CMOS smart temperature sensor with a 3/spl sigma/ inaccuracy of /spl plusmn/0.1/spl deg/C from -55/spl deg/C to 125/spl deg/C

Abstract: A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process. Substrate PNP transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the PNP transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within /spl plusmn/0.5/spl deg/C (3/spl sigma/) from -50/spl deg/C to 120/spl deg/C.

An Energy-Efficient 15-Bit Capacitive-Sensor Interface Based on Period Modulation

Abstract: This paper presents an energy-efficient capacitive-sensor interface with a period-modulated output signal. This interface converts the sensor capacitance to a time interval, which can be easily digitized by a simple digital counter. It is based on a relaxation oscillator consisting of an integrator and a comparator. To enable the use of a current-efficient telescopic OTA in the integrator, negative feedback loops are applied to limit the integrator's output swing. To obtain an accurate ratiometric output signal, auto-calibration is applied. This eliminates errors due to comparator delay, thus enabling the use of a low-power comparator. Based on an analysis of the stability of the negative feedback loops, it is shown how the current consumption of the interface can be traded for its ability to handle parasitic capacitors. A prototype fabricated in 0.35 μm standard CMOS technology can handle parasitic capacitors up to five times larger than the sensor capacitance. Experimental results show that it achieves 15-bit resolution and 12-bit linearity within a measurement time of 7.6 ms for sensor capacitances up to 6.8 pF, while consuming only 64 μA from a 3.3 V power supply. Compared to prior work with similar performance, this represents a significant improvement in energy efficiency.

A 140 dB-CMRR Current-Feedback Instrumentation Amplifier Employing Ping-Pong Auto-Zeroing and Chopping

Abstract: This paper presents a precision general-purpose current-feedback instrumentation amplifier (CFIA) that employs a combination of ping-pong auto-zeroing and chopping to cancel its offset and 1/f noise. A comparison of offset-cancellation techniques shows that neither chopping nor auto-zeroing is an ideal solution for general-purpose CFIAs, since chopping results in output ripple, and auto-zeroing is associated with increased low-frequency noise. The presented CFIA mitigates these unintended side effects through a combination of these techniques. A ping-pong auto-zeroed input stage with slow-settling offset-nulling loops is applied to limit the bandwidth of the increased noise to less than half of the auto-zeroing frequency. This noise is then modulated away from DC by chopping the input stage at half the auto-zeroing frequency, reducing the low-frequency noise to the 27 nV/ white-noise level, without introducing extra output ripple. The auto-zeroing is augmented with settling phases to further reduce output transients. The CFIA was realized in a 0.5 μm analog CMOS process and achieves a typical offset of 2.8 μV and a CMRR of 140 dB in a common-mode voltage range that includes the negative supply.

A 1.2-V 8.3-nJ CMOS Humidity Sensor for RFID Applications

Abstract: This paper presents a fully integrated CMOS humidity sensor for a smart RFID sensor platform. The sensing element is a CMOS-compatible capacitive humidity sensor, which consists of top-metal finger-structure electrodes covered by a humidity-sensitive polyimide layer. Its humidity-sensitive capacitance is digitized by an energy-efficient capacitance-to-digital converter (CDC) based on a third-order delta-sigma modulator. This CDC employs current-efficient operational transconductance amplifiers based on current-starved cascoded inverters, whose limited output swing is accommodated by employing a feedforward loop-filter topology. A programmable offset capacitor is included to remove the sensor's baseline capacitance and thus reduce the required dynamic range. To reduce offset errors due to charge injection of the switches, the entire system is auto-zeroed. The proposed humidity sensor has been realized in a 0.16- μm CMOS technology. Measurement results show that the CDC performs a 12.5-bit capacitance-to-digital conversion in a measurement time of 0.8 ms, while consuming only 8.6 μA from a 1.2-V supply. This corresponds to a state-of-the-art figure-of-merit of 1.4 pJ/conversion-step. Combined with the co-integrated humidity sensing element, it provides a resolution of 0.05% RH in the range from 30% RH to 100% RH while consuming only 8.3 nJ per measurement, which is an order-of-magnitude less energy than the state-of-the-art.

Precision temperature measurement using CMOS substrate pnp transistors

Abstract: This paper analyzes the nonidealities of temperature sensors based on substrate pnp transistors and shows how their influence can be minimized. It focuses on temperature measurement using the difference between the base-emitter voltages of a transistor operated at two current densities. This difference is proportional to absolute temperature (PTAT). The effects of series resistance, current-gain variation, high-level injection, and the Early effect on the accuracy of this PTAT voltage are discussed. The results of measurements made on substrate pnp transistors in a standard 0.5-/spl mu/m CMOS process are presented to illustrate the effects of these nonidealities. It is shown that the modeling of the PTAT voltage can be improved by taking the temperature dependency of the effective emission coefficient into account using the reverse Early effect. With this refinement, the temperature can be extracted from the measurement data with an absolute accuracy of /spl plusmn/0.1/spl deg/C in the range of -50 to 130/spl deg/C.

Design Of Analog Cmos Integrated Circuits

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Bio-Integrated Wearable Systems: A Comprehensive Review

Abstract: Bio-integrated wearable systems can measure a broad range of biophysical, biochemical, and environmental signals to provide critical insights into overall health status and to quantify human performance. Recent advances in material science, chemical analysis techniques, device designs, and assembly methods form the foundations for a uniquely differentiated type of wearable technology, characterized by noninvasive, intimate integration with the soft, curved, time-dynamic surfaces of the body. This review summarizes the latest advances in this emerging field of “bio-integrated” technologies in a comprehensive manner that connects fundamental developments in chemistry, material science, and engineering with sensing technologies that have the potential for widespread deployment and societal benefit in human health care. An introduction to the chemistries and materials for the active components of these systems contextualizes essential design considerations for sensors and associated platforms that appear in f...

Analyte monitoring system and methods

Abstract: Methods and systems for providing data communication in medical systems are disclosed including a data communication unit to transmit one or more signals related to the monitored analyte level received from the analyte sensor to a remote device.

A CMOS smart temperature sensor with a 3/spl sigma/ inaccuracy of /spl plusmn/0.1/spl deg/C from -55/spl deg/C to 125/spl deg/C

Abstract: A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process. Substrate PNP transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the PNP transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within /spl plusmn/0.5/spl deg/C (3/spl sigma/) from -50/spl deg/C to 120/spl deg/C.

A 1.8 $\mu$ W 60 nV $/\surd$ Hz Capacitively-Coupled Chopper Instrumentation Amplifier in 65 nm CMOS for Wireless Sensor Nodes

Abstract: This paper presents a low-power precision instrumentation amplifier intended for use in wireless sensor nodes. It employs a capacitively-coupled chopper topology to achieve a rail-to-rail input common-mode range as well as high power efficiency. A positive feedback loop is employed to boost its input impedance, while a ripple reduction loop suppresses the chopping ripple. To facilitate bio-potential sensing, an optional DC servo loop may be employed to suppress electrode offset. The IA achieves 1 μV offset, 0.16% gain inaccuracy, 134 dB CMRR, 120 dB PSRR and a noise efficiency factor of 3.3. The instrumentation amplifier was implemented in a 65 nm CMOS technology. It occupies only 0.1 mm2 chip area (0.2 mm2 with the DC servo loop) and consumes 1.8 μA current (2.1 μA with the DC servo loop) from a 1 V supply.