A system for providing power to a wireless card includes power interface that provides power to a compact flash card. A boost regulator boosts the power from the power interface. A battery provides power that is summed with the power from the power interface. Moreover, a buck regulator limits the voltage of the summed power. A compact flash card can be powered by the power interface while a wireless card can be powered by the summed power.

System and method for reducing external battery capacity requirement for a wireless card

A high efficiency power converter comprises a boost converter for converting an input voltage to a first voltage on a first output, a buck converter for converting the input voltage to a second voltage on a second output, a linear regulator for converting the first voltage to a third voltage on the second output when the second voltage is lower than a first threshold, and a voltage detector for detecting the input voltage for preventing a reverse current flowing from the second output to the buck converter when the input voltage is lower than a second threshold.

High efficiency power converter

A control system and method for simultaneously regulating the operation of a plurality of different types of switching power converters. The system utilizes in regulating the power converters sampled data and nonlinear feedback control loops.

Power converter circuitry and method

A method and system is provided for programming the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. The distributed power system comprises a plurality of point-of-load (POL) regulators each comprising at least one power switch adapted to convey power to a load and a digital controller adapted to control operation of the power switch responsive to a feedback measurement. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. A serial data bus operatively connects each of the plurality of POL regulators. A system controller is connected to the serial data bus and is adapted to communicate digital data to the plurality of POL regulators via the serial data bus. The digital data includes programming data for programming the plural filter coefficients. The system controller further comprises a user interface adapted to receive the programming data therefrom.

Method and system for communicating filter compensation coefficients for a digital power control system

A method is provided for modifying an image. The method comprises displaying an image, the image comprising a portion of an object; and determining if an edge of the object is in a location within the portion. The method further comprises detecting movement, in a member direction, of an operating member with respect to the edge. The method still further comprises moving, if the edge is not in the location, the object in an object direction corresponding to the detected movement; and modifying, if the edge is in the location, the image in response to the detected movement, the modified image comprising the edge in the location.

Information processing apparatus, information processing method and program

A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.

Control circuit and method for maintaining high efficiency over broad current ranges in a switching regulator circuit

A driver circuit for driving top and bottom power transistors stacked between two supply terminals is provided. The driver circuit includes shoot-through reduction means for monitoring the gate-to-source voltages of the two power transistors so as to inhibit the turning-ON of each power transistor until the gate-to-source voltage of the other power transistor has fallen to a voltage level indicative of the other transistor being OFF. Additionally, the driver circuit which can utilize a bootstrap capacitor for providing enhanced voltages to drive the top power transistor, also includes a bootstrap capacitor recharge means to monitor the output voltage of the circuit so as to inhibit the turning-ON of the top power transistor until the bootstrap capacitor has had sufficient time to recharge.

Circuit for driving two power mosfets in a half-bridge configuration

A switching mode voltage regulator circuit that operates at reduced quiescent current levels is provided. The voltage regulator preferably includes a control circuit and a switching element that connects and disconnects filter circuitry from the control circuit. An error amplifier in the control circuit is placed in a micropower operating state when the regulator is in standby mode to reduce quiescent current.

Circuit and method for reducing quiescent current in a switching regulator

Synchronous switching regulator circuits with voltage-drop sensing circuitry are presented in which the current sensing element typically in series with a load is eliminated, resulting in reduced dissipative losses and less costly manufacture. Voltage drops are measured across the regulator's synchronous switching element, and, in some cases, also across the regulator's main switching element. Measured voltage drops are used to derive a current analog signal indicative of the amount of current being supplied by the regulator. The current signal is then compared with a threshold value to determine whether the regulator's duty cycle should be varied.

Synchronous switching regulator which employs switch voltage-drop for current sensing

Switching regulator circuits and methods are provided in which the output circuit is adaptable to maintain high efficiency over various load current levels. The regulator circuits generate one or more control signals in response to the load current and selectively route a switch driver control signal to one or more switches in the output circuit. The switches differ in their size, such that the most efficient switch can be used at a particular load current level. At low load current levels, the driver control signal is routed to output circuitry with smaller switch devices, which incur smaller driver current losses for a given frequency of operation, thereby increasing the regulator efficiency. At high load current levels, the driver control signal is routed to large switch devices, which incur greater driver current losses for a given frequency of operation, but which have a lower impedance. The regulator thus maintains high efficiency over a wide range of load currents while operating at a constant frequency.

Milton E. Wilcox

Papers

Control circuit and method for maintaining high efficiency over broad current ranges in a switching regulator circuit

Circuit for driving two power mosfets in a half-bridge configuration

Circuit and method for reducing quiescent current in a switching regulator

Synchronous switching regulator which employs switch voltage-drop for current sensing

High efficiency switching regulator with adaptive drive output circuit