M
Min-Sang Kim
Researcher at Samsung
Publications - 61
Citations - 1420
Min-Sang Kim is an academic researcher from Samsung. The author has contributed to research in topics: Electrode & Transistor. The author has an hindex of 20, co-authored 61 publications receiving 1397 citations.
Papers
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Proceedings ArticleDOI
High performance 5nm radius Twin Silicon Nanowire MOSFET (TSNWFET) : fabrication on bulk si wafer, characteristics, and reliability
Sung Dae Suk,Sung-young Lee,Sung-min Kim,Eun-Jung Yoon,Min-Sang Kim,Ming Li,Chang Woo Oh,Kyoung Hwan Yeo,Sung Hwan Kim,Dong-Suk Shin,Kwan-Heum Lee,Heungsik Park,Jeorig Nam Han,Choong-Hee Park,Jong-Bong Park,Dong-Won Kim,Donggun Park,Byung-Il Ryu +17 more
TL;DR: For the first time, a gate-all-around twin silicon nanowire transistor (TSNWFET) was successfully fabricated on bulk Si wafer using self-aligned damascene-gate process.
Journal ArticleDOI
Fabrication and characterization of a nanoelectromechanical switch with 15-nm-thick suspension air gap
Weon Wi Jang,Jeong Oen Lee,Jun-Bo Yoon,Min-Sang Kim,Ji-Myoung Lee,Sung-min Kim,Keun Hwi Cho,Dong-Won Kim,Donggun Park,Won-Seong Lee +9 more
TL;DR: In this paper, a cantilever-type NEM switch with a 15-nm-thick suspension air gap and a 35-nmthick TiN beam was successfully fabricated and characterized.
Patent
Semiconductor device including FinFET having metal gate electrode and fabricating method thereof
TL;DR: In this paper, a FinFET with a metal gate electrode and a fabricating method of fabrication is presented, where the active area consists of an active area formed in a semiconductor substrate and protruding from a surface of the substrate; a fin including first and second protrusions, parallel with each other.
Journal ArticleDOI
NEMS switch with 30 nm-thick beam and 20 nm-thick air-gap for high density non-volatile memory applications
Weon Wi Jang,Jun-Bo Yoon,Min-Sang Kim,Ji-Myoung Lee,Sung-min Kim,Eun-Jung Yoon,Keun Hwi Cho,Sung-young Lee,In-Hyuk Choi,Dong-Won Kim,Donggun Park +10 more
TL;DR: In this paper, two types of titanium nitride (TiN) based nanoelectromechanical systems (NEMS) switches with the smallest dimensions ever made by typical top-down complementary metaloxide-semiconductor (CMOS) fabrication technology were successfully fabricated and electrically characterized.
Proceedings ArticleDOI
80 nm 512M DRAM with enhanced data retention time using partially-insulated cell array transistor (PiCAT)
Kyoung Hwan Yeo,Chang Woo Oh,Sung-min Kim,Min-Sang Kim,Chang-Sub Lee,Sung-young Lee,Ming Li,Hye-Jin Cho,Eun-Jung Yoon,Sung Hwan Kim,Jeong-Dong Choe,Dong-Won Kim,Donggun Park,Kinam Kim +13 more
TL;DR: In this paper, an 80 nm 512M DDR DRAM with partially-insulated cell array transistor (PiCAT) was fabricated, where Si/SiGe epitaxial growth and selective SiGe etch process were used to form PiOX (Partially-Insulating OXide) under source and drain of the cell transistor.