M
Moinuddin K. Qureshi
Researcher at Georgia Institute of Technology
Publications - 144
Citations - 11625
Moinuddin K. Qureshi is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Cache & Computer science. The author has an hindex of 44, co-authored 131 publications receiving 9956 citations. Previous affiliations of Moinuddin K. Qureshi include IBM & University of Texas at Austin.
Papers
More filters
Proceedings ArticleDOI
Energy Aware Persistence: Reducing Energy Overheads of Memory-based Persistence in NVMs
TL;DR: Novel energy-aware persistence (EAP) principles are developed that identify data durability (logging) as the dominant factor in energy increase and a relaxed durability mechanism - ACI-RD - that relaxes data logging without affecting the correctness of an application is proposed.
Proceedings ArticleDOI
SafeGuard: Reducing the Security Risk from Row-Hammer via Low-Cost Integrity Protection
TL;DR: This paper proposes SafeGuard, which equips the system with low-cost integrity protection as a defense against potential attacks that break the RH mitigation, and develops SafeGuard for systems that employ ECC modules, which can provide strong detection to both SECDED and Chipkill.
Patent
Probabilistic associative cache
TL;DR: Probabilistic Set Associative Cache (PAC) as mentioned in this paper is a (1+P)-way set associative cache, where the chosen parameter called Override Probability P determines the average associativity, for example, for P=0.
Proceedings ArticleDOI
HAMMER: boosting fidelity of noisy Quantum circuits by exploiting Hamming behavior of erroneous outcomes
TL;DR: This paper proposes Hamming Reconstruction (HAMMER), a post-processing technique that leverages the observation of Hamming behavior to reconstruct the noisy output distribution, such that the resulting distribution has higher fidelity.
Proceedings ArticleDOI
SuDoku: Tolerating High-Rate of Transient Failures for Enabling Scalable STTRAM
TL;DR: The problem of efficiently tolerating transient failures using scalable Spin-Transfer Torque RAM (STTRAM) as an example is studied and SuDoku, a design that provisions each line with ECC-1 and a strong error detection code, and relies on a region-based RAID-4 to perform correction of multi-bit errors is proposed.