scispace - formally typeset
N

Naoyuki Ohse

Researcher at National Institute of Advanced Industrial Science and Technology

Publications -  15
Citations -  177

Naoyuki Ohse is an academic researcher from National Institute of Advanced Industrial Science and Technology. The author has contributed to research in topics: Substrate (electronics) & Layer (electronics). The author has an hindex of 6, co-authored 15 publications receiving 140 citations.

Papers
More filters
Proceedings ArticleDOI

Body PiN diode inactivation with low on-resistance achieved by a 1.2 kV-class 4H-SiC SWITCH-MOS

TL;DR: In this article, an SBD-wall-integrated trench MOSFET (SWITCH-MOS) was developed, in which small cell pitch of 5pm was realized by utilizing trench side walls both for SBD and MOS channel with buried p+ layer.
Journal ArticleDOI

1200 V SiC IE-UMOSFET with low on-resistance and high threshold voltage

TL;DR: In this paper, a SiC UMOSFET is developed to cope with the trade-off between low on-resistance and extremely low gate oxide field, which is known as gate oxide protection.
Patent

Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device

TL;DR: In this article, the authors proposed a silicon carbide semiconductor device with a gate electrode in the trench via a gate insulating film, and a source electrode in contact with the channel layer and the source region.
Journal ArticleDOI

3300V-Class 4H SiC Implantation-Epitaxial Mosfets with Low Specific On-Resistance of 11.6mΩcm2 and High Avalanche Withstanding Capability

TL;DR: In this paper, a 3300V-class IEMOSFET was developed by means of the optimization of current spreading layers (CSLs) to achieve low specific on-resistance (RONA) of 11.6mΩcm2, while maintaining high blocking voltage (BVDSS) of 3978V.