Navya Sri Garigapati

Bio: Navya Sri Garigapati is an academic researcher from Indian Institute of Technology Bombay. The author has contributed to research in topics: Electron mobility & Effective mass (spring–mass system). The author has an hindex of 2, co-authored 4 publications receiving 23 citations.

Thermally Grown TiO 2 and Al 2 O 3 for GaN-Based MOS-HEMTs

Abstract: We have demonstrated the potential use of thermally grown TiO2 and Al2O3 oxides as gate dielectrics for GaN-based high-electron-mobility-transistors. TiO2 and Al2O3 are found to provide negative and positive band offsets with AlGaN, respectively. A significant performance improvement on various device characteristics provides evidence for its potential use. The oxides are formed by a combination of predeposition of a thin film and followed by oxidation in pure O2 environment. The formation and thickness of the oxides are confirmed through the X-ray photoelectron spectroscopy and the transmission electron microscopy. The performance improvement for TiO2- and Al2O3-based oxide gates have been identified in terms of a ideality factor and a reduction in the gate leakage current in comparison with that of control devices. This is further augmented by an increase in the ${n}_{s}\times \mu $ product. The ON/OFF current ratio and turn-ON voltage increase by 2–3 orders of magnitude and 0.3–0.6, respectively, for the Schottky diodes. The negative shift on the capacitance–voltage characteristics is also found to be minimal, indicating higher gate coupling with thermally grown oxides.

Low field mobility in electrostatically evolved AlGaN/GaN one-dimensional channel from a two-dimensional electron gas system

Abstract: Here, we have investigated size dependent electron mobility in an electrostatically evolved AlGaN/GaN one-dimensional channel from a two-dimensional heterostructure. An architecture with lateral gates, which allows partial depletion of channel widths, has been used. The low field mobility is found to manifest multiple peaks and valleys for progressively changing quantum confinement. The number of sub-bands increases with the increasing dimension. However, electron and phonon confinement decrease, which leads to less wave-function overlap. Although an increase in the number of sub-bands decreases the mobility due to the larger number of density of states, the overlap decreases monotonically which increases the mobility. The two competing effects lead to a unique signature on the mobility. The depletion region voltage exponent is found to differ from the traditional value of 0.5 in this case. The exponent is found to be close to unity for a one-dimensional system.

Mobility of near surface MOVPE grown InGaAs/InP quantum wells

Abstract: In this work, we study the electron mobility of near surface metal organic vapor phase epitaxy-grown InGaAs quantum wells. We utilize Hall mobility measurements in conjunction with simulations to quantify the surface charge defect density. Buried quantum wells are limited by polar optical phonon scattering at room temperature. In contrast, the quantum wells directly at the surface are limited by remote charge impurity scattering from defects situated at the III–V/oxide interface or inside the oxide, showing a mobility of 1500 cm2/V s. Passivating the InGaAs surface by depositing an oxide reduces the amount of defects at the interface, increasing the mobility to 2600 cm2/V s.

III-V nanowire MOSFETs with novel self-limiting Λ-ridge spacers for RF applications

Abstract: We present a semi self-aligned processing scheme for III-V nanowire transistors with novel semiconductor spacers in the shape of Λ-ridges, utilising the effect of slow growth rate on {111}B facets. The addition of spacers relaxes the constraint on the perfect alignment of gate to contact areas to enable low overlap capacitances. The spacers give a field-plate effect that also helps reduce off-state and output conductance while increasing breakdown voltage. Microwave compatible devices with L g = 32 nm showing f T = 75 GHz and f max = 100 GHz are realized with the process, demonstrating matched performance to spacer-less devices but with relaxed scaling requirements.

Strained InxGa(1−x)As/InP near surface quantum wells and MOSFETs

Abstract: We present electronic band structure properties of strained In xGa(1− x)As/InP heterostructure near surface quantum wells oriented in the (100) crystallographic direction using eight-band [Formula: see text] theory, which are further parameterized by an energy level, effective mass, and nonparabolicity factor. The electronic band structure parameters are studied for the well composition of 0.2 ≤ x ≤ 1 and thickness from 5 to 13 nm. The bandgap and effective mass of the strained wells are increased for x >0.53 due to compression strain and decreased for x < 0.53 due to tensile strain as compared to that of unstrained wells. The calculated band structure parameters are utilized in modeling long channel In0.71Ga0.29As/InP quantum well MOSFETs, and the model is validated against measured I–V and low frequency C–V characteristics at room temperature and cryogenic temperature. Exponential band tails and first- and second-order variation of the charge centroid capacitance and interface trap density are included in the electrostatic model. The Urbach parameter obtained in the model is E0 = 9 meV, which gives subthreshold swing (SS) of 18 mV/dec at T = 13 K and agrees with the measured SS of 19 mV/dec. Interface trap density is approximately three orders higher at T = 300 K compared to T = 13 K due to multi-phonon activated traps. This model emphasizes the importance of considering disorders in the system in developing device simulators for cryogenic applications.

Ti/Au/Al/Ni/Au Low Contact Resistance and Sharp Edge Acuity for Highly Scalable AlGaN/GaN HEMTs

Abstract: In this letter, we have reported a novel metal scheme Ti/Au/Al/Ni/Au for ohmic contact on AlGaN/GaN high-electron-mobility transistors. The reported metal scheme is observed to show minimum metal out-diffusion and sharp edge acuity at high-temperature annealing, which facilitates aggressive scaling of source–drain separation ( ${L} _{\textsf {SD}}$ ). We have demonstrated ${L} _{\textsf {SD}}$ as low as 300 nm with gate length ( ${L} _{\textsf {g}}$ ) of 100 nm for this metal stack. We observed improvement in ON-resistance ( ${R} _{\mathrm{\scriptscriptstyle ON}}$ ) from 3 to $1.25~\Omega \cdot$ mm, transconductance ( ${g} _{\textsf {m}}$ ) from 276 to 365 mS/mm, saturation drain current ( ${I} _{\textsf {DS,sat}}$ ) from 906 to 1230 mA/mm, and unity current gain frequency ( ${f} _{\textsf {T}}$ ) from 70 to 93 GHz by scaling ${L} _{\textsf {SD}}$ from $3~\mu \text{m}$ to 300 nm. The gate lengths for all devices were 100 nm.

Gate Current Reduction and Improved DC/RF Characteristics in GaN-Based MOS-HEMTs Using Thermally Grown TiO 2 as a Dielectric

Abstract: This paper demonstrates a reduction in the gate leakage current and improvement in transistor characteristics in thermally grown TiO2/AlGaN/GaN heterostructure-based metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs). In contrast to the conventional AlGaN/GaN HEMTs, thermionic field emission through gate is not the dominant current transport mechanism for the thermally grown TiO2/AlGaN interface. The gate current is greatly affected by the properties of the oxide material and oxide–semiconductor interface in addition to the property of the barrier layer. The MOS-HEMTs with a 3.4-nm-thick TiO2 gate insulator exhibits a low gate leakage current of 10−8 Acm−2, which leads to superior device performances in terms of saturation drain current, peak transconductance, subthreshold swing, and unity gain frequency of 620 mA/mm, 158 mS/mm, 75 mV/decade, and 7 GHz, respectively, for a 400-nm gate length device. This is further augmented by an increase in ON/OFF ratio to ${5}\times {10}^{{8}}$ and a large reduction in the subthreshold leakage current by at least two orders of magnitude in comparison to that of a control HEMT. Trap-assisted tunneling (TAT) and Poole–Frenkel (PF) emission are found to be the dominant current mechanisms for gate leakage at high temperatures and moderate electric field. The activation energy of traps in PF emission is found to be 0.49 eV, and the extracted trap energy levels for the TAT are found to be in the range of 1.7–2.2 eV. The reverse bias current is found to saturate at high voltages when the field across the diode also saturates. The transistor characteristics improvement is largely ascribed to an increase in 2-D electron gas (2DEG) density.

Realization of high quality silicon nitride deposition at low temperatures

Abstract: This work demonstrates the low temperature thin-film deposition of silicon nitride ( SiN x) for III-nitride-based high electron mobility transistors using inductively coupled plasma chemical vapor deposition. It is observed that the nonlinear dependency of the deposition temperature and gas flow rates have a profound impact on the film quality. The process parameter space is scanned and the optimum film quality is achieved, which is verified with physical and electrical characterizations. The best quality film is achieved at a deposition temperature of 380 °C demonstrating near ideal stoichiometry with negligible hydrogen ( <5%) and oxygen ( <3%) concentrations. In addition, the optimized film is found to have zero pinholes even at a thickness of 10 nm and is uniform over a large area with an rms roughness of 0.58 nm. The deposited films are characterized by atomic force microscopy, Fourier transform infrared spectroscopy, and X-ray photoelectron spectroscopy. The dielectric strength and dielectric constant of these films are determined from current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the metal-insulator-metal structure, respectively. For the best quality film, the values of dielectric strength and dielectric constant are measured to be ∼ 8 MV/cm and ∼ 7.5, respectively. A metal-insulator-semiconductor-heterostructure (metal/SiN x/AlGaN/GaN) capacitor is fabricated with the optimized recipe for interface characterization. The density of slow traps is determined from the hysteresis in the C-V curve and found to be 7.38 × 10 10 cm − 2. The frequency dependent conductance method is also used to investigate the trap density. The trap state density is found to be 1.67 × 10 12 cm − 2 eV − 1 at 0.29 eV below conduction band.

Epi-Gd2O3/AlGaN/GaN MOS HEMT on 150 mm Si wafer: A fully epitaxial system for high power application

Abstract: In this letter, we report the impact of epitaxial Gd2O3 on the electrical properties of an AlGaN/GaN high electron mobility transistor (HEMT) grown on a 150 mm diameter Si (111) substrate. Incorporation of epitaxial Gd2O3 grown by the molecular beam epitaxy technique under a metal gate (metal/Gd2O3/AlGaN/GaN) causes six orders of magnitude reduction in gate leakage current compared to metal/AlGaN/GaN HEMT. We observe that epi-Gd2O3 undergoes complete structural changes from hexagonal to monoclinic as the thickness of the layer is increased from 2.8 nm to 15 nm. Such structural transformation is found to have a strong impact on electrical properties whereby the gate leakage current reaches its minimum value when the oxide thickness is 2.8 nm. We find a similar trend in the density of interface traps (Dit) having a minimum value of 2.98 × 1012 cm−2 eV−1 for the epioxide layer of thickness 2.8 nm. Our measurements also confirm a significant increase in the two dimensional electron gas (2DEG) density (∼40%) at AlGaN/GaN interface with epioxide grown on AlGaN, thus confirming the contribution of epitaxial lattice strain on 2DEG modulation.