Nicola Pavarelli

Bio: Nicola Pavarelli is an academic researcher from Tyndall National Institute. The author has contributed to research in topics: Silicon photonics & Photonics. The author has an hindex of 9, co-authored 17 publications receiving 255 citations. Previous affiliations of Nicola Pavarelli include Huawei & University College Cork.

Optical and Electronic Packaging Processes for Silicon Photonic Systems

Abstract: Fiber optic interconnection processes and hybrid integration of electronic devices for high speed Si photonic systems are presented. Thermal effects arising from these hybrid integration processes are also investigated. An overview of ePIXfab which offers affordable access to an advanced Si photonic foundry service is also presented. This includes the presentation of fundamental photonic packaging design rules which can greatly reduce the time and cost associated with the development of complex Si photonic devices.

22.5 A 4×20Gb/s WDM ring-based hybrid CMOS silicon photonics transceiver

Abstract: Silicon photonics (SiPh) has been identified as a prime technology targeting cost-effective short-range optical links [1] Wavelength-division multiplexing (WDM) is an attractive approach for enabling high aggregate transceiver bandwidth without increasing the number of optical fibers used in the link Ring-based optical modulators and wavelength-selective filters are attractive devices for scalable WDM SiPh transceivers owing to their compact footprint and moderate power required for thermal tuning In this paper, we report on a thermally controlled ring-based flip-chip integrated CMOS-SiPh transceiver with 4 channels operating at 20Gb/s

Meeting the Electrical, Optical, and Thermal Design Challenges of Photonic-Packaging

Abstract: Integrated photonics is a promising route toward high-performance next-generation ICT and sensing devices. Although fiber-packaging is perhaps the most widely discussed obstacle to low-cost photonic devices, electronic-photonic integration and thermal-stabilization are also significant design considerations that need to be properly managed. Using a state-of-the-art Si-photonic optical-network-unit as a worked example, we illustrate some key challenges and solutions in the field of photonic-packaging. Specifically, we describe a novel solder-reflow bonding process for the face-to-face three-dimensional (3-D) integration of photonic and electronic integrated circuits, discuss current and future multichannel fiber-alignment techniques, and investigate the coefficient-of-performance of the thermo-electric cooler that stabilizes the temperature of the photonic components. The challenge of photonic-packaging is to simultaneously satisfy these electrical, optical, and thermal design requirements on small-footprint devices, while establishing a route to scalable commercial implementation.

Dense WDM transmission at 2 μm enabled by an arrayed waveguide grating.

Abstract: We show, for the first time, dense WDM (8×20 Gbit/s) transmission at 2 μm enabled by advanced modulation formats (4-ASK Fast-OFDM) and the development of key components, including a new arrayed waveguide grating (AWGr) at 2 μm. The AWGr shows -12.8±1.78 dB of excess loss with an 18-dB extinction ratio and a thermal tunability of 0.108 nm/°C.

Thermally Controllable Silicon Photonic Crystal Nanobeam Cavity without Surface Cladding for Sensing Applications

Abstract: Photonic crystal nanobeam cavities with high-quality factors are very sensitive to the dielectric properties of their surroundings. Combining this high sensitivity with a specially designed heater, we experimentally demonstrate a very sensitive optical sensor, capable of simultaneously providing heat and interrogating the refractive index of its surroundings. The structure presents experimental sensitivity of 98 nm/RIU and signal-to-noise ratio of 3.88 × 10^(–4) RIU and provides approximately 100 °C of temperature variation in the sensing area, with a temperature switching time of a few microseconds.

Single-chip microprocessor that communicates directly using light

Abstract: An electronic–photonic microprocessor chip manufactured using a conventional microelectronics foundry process is demonstrated; the chip contains 70 million transistors and 850 photonic components and directly uses light to communicate to other chips. The rapid transfer of data between chips in computer systems and data centres has become one of the bottlenecks in modern information processing. One way of increasing speeds is to use optical connections rather than electrical wires and the past decade has seen significant efforts to develop silicon-based nanophotonic approaches to integrate such links within silicon chips, but incompatibility between the manufacturing processes used in electronics and photonics has proved a hindrance. Now Chen Sun et al. describe a 'system on a chip' microprocessor that successfully integrates electronics and photonics yet is produced using standard microelectronic chip fabrication techniques. The resulting microprocessor combines 70 million transistors and 850 photonic components and can communicate optically with the outside world. This result promises a way forward for new fast, low-power computing systems architectures. Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome1,2,3 by using optical communications based on chip-scale electronic–photonic systems4,5,6,7 enabled by silicon-based nanophotonic devices8. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic–photonic chips9,10,11 are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic–photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics12, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors13,14,15,16. This demonstration could represent the beginning of an era of chip-scale electronic–photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

Roadmap on silicon photonics

Abstract: Silicon photonics research can be dated back to the 1980s. However, the previous decade has witnessed an explosive growth in the field. Silicon photonics is a disruptive technology that is poised to revolutionize a number of application areas, for example, data centers, high-performance computing and sensing. The key driving force behind silicon photonics is the ability to use CMOS-like fabrication resulting in high-volume production at low cost. This is a key enabling factor for bringing photonics to a range of technology areas where the costs of implementation using traditional photonic elements such as those used for the telecommunications industry would be prohibitive. Silicon does however have a number of shortcomings as a photonic material. In its basic form it is not an ideal material in which to produce light sources, optical modulators or photodetectors for example. A wealth of research effort from both academia and industry in recent years has fueled the demonstration of multiple solutions to these and other problems, and as time progresses new approaches are increasingly being conceived. It is clear that silicon photonics has a bright future. However, with a growing number of approaches available, what will the silicon photonic integrated circuit of the future look like? This roadmap on silicon photonics delves into the different technology and application areas of the field giving an insight into the state-of-the-art as well as current and future challenges faced by researchers worldwide. Contributions authored by experts from both industry and academia provide an overview and outlook for the silicon waveguide platform, optical sources, optical modulators, photodetectors, integration approaches, packaging, applications of silicon photonics and approaches required to satisfy applications at mid-infrared wavelengths. Advances in science and technology required to meet challenges faced by the field in each of these areas are also addressed together with predictions of where the field is destined to reach.

In situ 3D nanoprinting of free-form coupling elements for hybrid photonic integration

Abstract: Hybrid photonic integration combines complementary advantages of different material platforms, offering superior performance and flexibility compared with monolithic approaches. This applies in particular to multi-chip concepts, where components can be individually optimized and tested. The assembly of such systems, however, requires expensive high-precision alignment and adaptation of optical mode profiles. We show that these challenges can be overcome by in situ printing of facet-attached beam-shaping elements. Our approach allows precise adaptation of vastly dissimilar mode profiles and permits alignment tolerances compatible with cost-efficient passive assembly techniques. We demonstrate a selection of beam-shaping elements at chip and fibre facets, achieving coupling efficiencies of up to 88% between edge-emitting lasers and single-mode fibres. We also realize printed free-form mirrors that simultaneously adapt beam shape and propagation direction, and we explore multi-lens systems for beam expansion. The concept paves the way to automated assembly of photonic multi-chip systems with unprecedented performance and versatility. By exploiting two-photon laser lithography for in situ printing of facet-attached beam-shaping elements, hybrid photonic integration can now be realized, opening opportunities for the automated assembly of photonic multi-chip systems with unprecedented performance and versatility.

Optical Refractive Index Sensors with Plasmonic and Photonic Structures: Promising and Inconvenient Truth

Abstract: DOI: 10.1002/adom.201801433 Scientific American selects plasmonic sensing as the top 10 emerging technologies of 2018.[15] Almost every single new plasmonic or photonic structure would be explored to test its sensing ability.[16–29] These works tend to report the sensing performance of their own structure. Some declare that their sensitivity breaks the world record. However, there is still a missing literature on what the world record really is, the gap between the experiments and the theoretical limit, as well as the differences between metal-based plasmonic sensors and dielectric-based photonic sensors. To push plasmonic and photonic sensors into industrial applications, an optical sensing technology map is absolutely necessary. This review aims to cover a wide range of most representative plasmonic and photonic sensors, and place them into a single map. The sensor performances of different structures will be distinctly illustrated. Future researchers could plot the sensing ability of their new sensors into this technology map and gauge their performances in this field. In this review, we focus on optical refractive index (RI) sensors with no fluorescent labeling required. We will utilize two parameters to characterize and compare the performance of optical RI sensors: sensitivity to RI change (denoted by symbol SRI) and figure of merit (in short, FoM). For simplicity, we restrict our discussions to bulk RI change, where the change in RI occurs within the whole sample. There is another case where the RI variation occurs only within a very small volume close to the sensor surface. This surface RI sensitivity is proportional to the bulk RI sensitivity, the ratio of the thickness of the layer within which the surface RI variation occurs, and the penetration depth of the optical mode.[6] The bulk RI sensitivity defines the ratio of the change in sensor output (e.g., resonance angle, intensity, or resonant wavelength) to the bulk RI variations. Here, we limit our discussions to the spectral interrogations and the bulk RI sensitivity SRI is given by[3,5–7,30]

Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

Abstract: Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved.