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Showing papers by "Nils Weimann published in 2006"


Journal ArticleDOI
TL;DR: In this article, the structural quality of the DBR layers is maintained by compensating the compressive and tensile stress in each λ∕4 pair, which results in the lowest elastic strain energy and allows the growth of coherently strained DBRs.
Abstract: We demonstrate high-reflectivity crack-free Al0.18Ga0.82N∕Al0.8Ga0.2N distributed Bragg reflectors (DBR) for the spectral region around 350nm grown by molecular-beam epitaxy on thick GaN templates. The structural quality of the DBR layers is maintained by compensating the compressive and tensile stress in each λ∕4 pair. This approach results in the lowest elastic strain energy and allows the growth of thick coherently strained DBRs. A 25 period mirror provides a 26nm wide stop band centered at 347nm with the maximum reflectivity higher than 99%.

38 citations


Proceedings ArticleDOI
11 Jun 2006
TL;DR: In this article, a 0.5 mum emitter double-heterojunction InGaAs/InP HBT (D-HBT) technology with a current gain cutoff frequency and a maximum oscillation frequency (fmax) of 337 and 345 GHz, respectively.
Abstract: High-performance and compact distributed amplifiers were realized in a 0.5 mum emitter double-heterojunction InGaAs/InP HBT (D-HBT) technology with a current gain cutoff frequency (fT) and a maximum oscillation frequency (fmax) of 337 and 345 GHz, respectively. A gain of 17 dB with flatness within 1.5 dB was obtained from 45 MHz up to 110 GHz, the highest available measurement frequency. The measured input and output reflection of the amplifier are better than - 10 dB up to respectively 100 and 110 GHz. The resulting gain bandwidth product (GBW) is more than 750 GHz which is the highest reported so far for any single-stage amplifiers to our knowledge

30 citations


Proceedings ArticleDOI
05 Jun 2006
TL;DR: In this article, an InP-based photonic integrated circuit for high-speed digital-to-analog (DAC) conversion is presented, which achieves a single-tone spurious-free dynamic range (SFDR) of 32 dB with 4 control bits at 12.5 Gsample/s.
Abstract: We demonstrate an InP-based photonic integrated circuit for high-speed digital-to-analog (DAC) conversion. We obtained a single-tone spurious-free dynamic range (SFDR) of 32 dB with 4 control bits at 12.5 Gsample/s.

13 citations


Journal ArticleDOI
TL;DR: In this paper, a planar fabrication technology using all dry etched mesas, which scales to 0.25 µm emitter size, was developed for mm-wave power electronics and mixed-mode applications beyond 100 GHz clock speed.
Abstract: Indium Phosphide-based Hetero Bipolar Transistors (HBTs) have shown strong potential for mm-wave power electronics and mixed-mode applications beyond 100 GHz clock speed. We have developed a planar fabrication technology using all dry etched mesas, which scales to 0.25 µm emitter size. Devices show cut-off frequencies of ft = 380 GHz and fmax = 380 GHz simultaneously (optimized for highest fmax) or ft = 410 GHz and fmax = 340 GHz (optimized for ft). As technology test vehicles, we have realized static-by-four divider circuits running at up to 130 GHz with a baseline epitaxial structure yielding ft = 330 GHz and fmax = 300 GHz; Voltage-Controlled oscillators fabricated in the 380 GHz technology delivered power output of 0 dBm at 180 GHz. The possibility of reducing the extrinsic base-collector capacitance along with the device height by selective ion-implantation of the subcollector is explored. (© 2006 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

7 citations


Proceedings ArticleDOI
07 May 2006
TL;DR: In this paper, a high speed phototransistor with integrated waveguide based on double hetrojunction bipolar transistor (DHBT) process technology is presented, with an optical gain cutoff frequency F,* of 447 GHz with an internal optical gain of over gePt=30 at a base current of It.
Abstract: We present a high speed phototransistor with integrated waveguide based on our InP double hetrojunction bipolar transistor (DHBT) process technology. We measured an optical-gain cutoff frequency F,* of 447 GHz with an internal optical gain of over gePt=30 at a base current of It.=650 pA using devices with emitter dimensions of A=0.7 x 4 pm2.

5 citations


Proceedings ArticleDOI
Nils Weimann1, Vincent Houtsma1, Y. Yang1, J. Frackoviak1, A. Tate1, Y.K. Chen1 
26 Jun 2006
TL;DR: In this paper, the authors demonstrate a manufacturable InP HBT technology which relies on dry etching of all three semiconductor mesas (emitter, base, and subcollector), thus greatly improving control of critical dimensions and device parameters.
Abstract: Indium Phosphide-based Double-Heterostructure Bipolar Transistors have high potential for analog, digital, and mixed-signal applications requiring extreme clock speed and high voltage swing. To harness the full performance of the InGaAs/InP material system, the HBTs need to be scaled to submicron dimensions. Yield has always been an issue with wet-etch defined submicron InP HBTs. More complex circuits require homogeneous and reproducible processing techniques. We demonstrate a manufacturable InP HBT technology which relies on dry etching of all three semiconductor mesas (emitter, base, and subcollector), thus greatly improving control of critical dimensions and device parameters such as Cbc, Cbe, and collector current at which maximumft and fmax are attained. Further, we replaced the traditional emitter metal liftoff patterning process by dryetched refractory metal. When scaling the emitter area, the emitter resistance increases inversely with the emitter size, requiring reduction of the specific emitter resistance. Dry etching of the emitter contact metal and the underlying semiconductor allows for a straight edge of the emitter contact, as opposed to wet etching: the crystallographic etching of InGaAs leaves a pyramidal shape, reducing the contact area, and inhibiting scaling of the emitter size. We achieved total emitter resistance as low as 5 Q for an emitter junction area of 0.5 x 4 jtm2(extracted from S-parameter measurements). Dry etching of the base mesa allows for a tight base layout, keeping Cbc low from the onset. For our highest performance devices, we dry etched the base and part of the collector, followed by a selective wet etch of InP to reduce the base-collector capacitance. In this setup, the vertical and lateral etches can be tailored independently. Minimum Cbc of 5.5 fF was recorded for HBTs with 0.5 x 4 ptm emitter geometry. Thirdly, the subcollector is defined by a mesa dry etch. The use of dry etch processing allows for a tight HBT layout, allowing dense HBT device packing. InP is used as a subcollector material owing to the superior thermal properties of InP as compared to InGaAs. The subcollector etch is terminated based on a laser interferometer signal, indicating the point where the etch reaches the semi-insulating InP substrate. This method is reliable enough to forgo any InGaAs etch stop layers, lowering the total thermal resistance of the device. The vertical dry etching in InP and InGaAs is based on extensive development work of hightemperature inductively coupled plasma etching. BC13, C12, and N2 are used as etch gases. The role ofN2 is to reduce the removal rate of phosphorus and arsenic compounds, respectively. As a result, smooth vertical surfaces and smooth trenches are obtained. The etch rate in the high-temperature regime well above the temperature where InCl becomes volatile (about 1 70°C) is very well defined from run to run over many months. The measured data and the extracted device model do not show detrimental impact of the dry etches on the ideality factors, leakage currents, and current gain. This device technology has been proven in InP HBT MMICs including broadband amplifiers, static dividers, and push-push oscillators, with more than 130 GHz bandwidth.

3 citations


Proceedings ArticleDOI
Y.K. Chen1, Yves Baeyens1, Nils Weimann1, Jaesik Lee1, J. Weiner1, Vincent Houtsma1, Y. Yang1 
01 Sep 2006
TL;DR: An overview of recent advances in high speed III-V compound devices and integrated circuits for high capacity wireless and optic fiber communications is provided.
Abstract: Compound III-V semiconductor circuits promise fast and power efficient analog, digital and mixed-mode applications. This paper will provide an overview of recent advances in high speed III-V compound devices and integrated circuits for high capacity wireless and optic fiber communications. Several critical compound semiconductor ASIC technologies and their unique performance advantages over prevailing silicon CMOS and SiGe technologies will be illustrated.

1 citations