Noor E. Mohamed V

Bio: Noor E. Mohamed V is an academic researcher from TSMC. The author has contributed to research in topics: NQS & Equivalent circuit. The author has an hindex of 1, co-authored 2 publications receiving 5 citations.

Accurate and Computationally Efficient Modeling of Nonquasi Static Effects in MOSFETs for Millimeter-Wave Applications

Abstract: A lumped-circuit nonquasi-static (NQS) model, that is applicable for both large-signal transient simulations and a small-signal ac analysis, is developed in this paper. An improved physical equivalent circuit, capturing NQS effects in the millimeter waveband, is derived using a transmission line model, by incorporating the high-frequency longitudinal gate electrode and a channel distributed RC network. The proposed model is implemented in a BSIM-BULK MOSFET model and validated with dc and RF data, obtained from technology computer-aided design device simulations and experimental data. The proposed model is in very good agreement with the data up to ${50}{f}_{t}$ . The transient currents, for a gate-voltage switching rate of ${5}\times {10}^{{10}}$ V/s, show excellent match with the data. The dc, transient, and ac simulations using the proposed model are much faster than a 10-segmented MOSFET model. This shows that the proposed model is better than other computationally complex compact models, for most RF applications.

3D IC power grid and forming method thereof

Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.

BSIM-HV: High-Voltage MOSFET Model Including Quasi-Saturation and Self-Heating Effect

Abstract: A BSIM-based compact model for a high-voltage MOSFET is presented. The model uses the BSIM-BULK (formerly BSIM6) model at its core, which has been extended to include the overlap capacitance due to the drift region as well as quasi-saturation effect. The model is symmetric and continuous, is validated with the TCAD simulations and experimental 35- and 90-V LDMOS and 40-V VDMOS transistors, and shows excellent agreement.

Improved Modeling of Bulk Charge Effect for BSIM-BULK Model

Abstract: In this brief, we present an improved model of bulk charge effect for both drain current ( ${I}_{\text {DS}}$ ) and capacitances and its implementation in the industry standard Berkeley short-channel IGFET model (BSIM)-BULK model. The proposed model captures all the well-known and important bulk charge effects, as the Abulk term does for BSIM3/BSIM4. The model is validated with the experimental and technology computer-aided design (TCAD) data. The proposed model enhances the fitting accuracy for ${I}_{\text {DS}}$ , and more importantly its derivatives and capacitances too.

BSIM-BULK: Accurate Compact Model for Analog and RF Circuit Design

Abstract: In this work, we present the recent and upcoming enhancements of the industry standard BSIM-BULK (formerly BSIM6) model. BSIM-BULK is the latest body referenced compact model for bulk MOSFETs having a unified core, which is developed by the BSIM group for accurate design of analog and RF circuits. The model satisfies the symmetry test for DC and AC, correctly predicts harmonic slope, and exhibits accurate results for RF and analog simulations. In order to further improve the model accuracy for transconductance $(g_{m})$ and output conductance $(g_{ds})$, an analytical model for bulk charge effect, in both current and capacitance, is implemented. Several other advanced models are added to capture real device physics. These include: parasitic current at the shallow trench isolation edges; leakage current components in zero threshold voltage native devices; new model for NQS to capture the NQS effects up to the millimeter wave regime; self heating effect; and heavily halo implanted MOSFET’s anomalous g m , flicker noise and I DS mismatch. All these enhancements have been implemented to high standards of computational efficiency and robustness.

Signal Integrity Analysis Based on SVR Improved Algorithm

Abstract: Compared with the traditional support vector machine regression (SVR), the SVR hyperparameter fast optimization algorithm can improve the accuracy of the prediction results. However, the data shows that when the training sample is too large, it will increase the complexity of model learning, resulting in too long modeling time. Therefore, we refer to the most effective support vector set search method in the variable selection and sparse support vector machine (VSߝSSVM) algorithm, and appropriately fit the “advantages” of these two algorithms to construct a fast optimization hyperparameter and sparse support vector machine (FOH-SSVM) algorithm. In this work, we use the algorithm to solve the problem of signal integrity. The experimental results show that the modeling time required by the FOH-SSVM algorithm is 1%, which greatly reduces the modeling time. At the same time, the prediction accuracy of the algorithm is increased by 8%, ensuring good prediction performance.

IPCEI subcontracts contributing to 22-FDX Add-On Functionalities at GF

Abstract: Highlights from Silicon Device Physics, material sciences and electrical engineering are among the first results to be presented from GFs subcontracts in the IPCEI-project, namely a reconfigurable FET compatible with 22-FDX-technology, a CMOS compatible new material Si doped HfO 2 for electrocaloric/ pyroelectric effects on chip, modelling of the 22FDX devices in the higher GHz range and first 5G Dual Band transceiver blocks designed in 22FDX