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Omar Abdelfattah

Bio: Omar Abdelfattah is an academic researcher from McGill University. The author has contributed to research in topics: CMOS & Phase-locked loop. The author has an hindex of 4, co-authored 10 publications receiving 98 citations.

Papers
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Journal ArticleDOI
TL;DR: Using a novel self-biasing technique to bias the OTA obviates the need for extra biasing circuitry and enhances the performance and design feasibility under ultra-low-voltage conditions.
Abstract: An operational-transconductance-amplifier (OTA) design for ultra-low voltage ultra-low power applications is proposed. The input stage of the proposed OTA utilizes a bulk-driven pseudo-differential pair to allow minimum supply voltage while achieving a rail-to-rail input range. All the transistors in the proposed OTA operate in the subthreshold region. Using a novel self-biasing technique to bias the OTA obviates the need for extra biasing circuitry and enhances the performance of the OTA. The proposed technique ensures the OTA robustness to process variations and increases design feasibility under ultra-low-voltage conditions. Moreover, the proposed biasing technique significantly improves the common-mode and power-supply rejection of the OTA. To further enhance the bandwidth and allow the use of smaller compensation capacitors, a compensation network based on a damping-factor control circuit is exploited. The OTA is fabricated in a 65 nm CMOS technology. Measurement results show that the OTA provides a low-frequency gain of 46 dB and rail-to-rail input common-mode range with a supply voltage as low as 0.5 V. The dc gain of the OTA is greater than 42 dB for supply voltage as low as 0.35 V. The power dissipation is 182 $\mu{\rm W}$ at $V_{DD}=0.5\ {\rm V}$ and 17 $\mu{\rm W}$ at $V_{DD}=0.35\ {\rm V}$ .

88 citations

Proceedings ArticleDOI
24 May 2015
TL;DR: The proposed OTA incorporates bulk-driven MOS transistors in the pseudo differential pair of the input stage to concurrently enable low voltage operation and rail-to-rail input range and uses a common-mode feedforward (CMFF) circuit in the first stage to bias the following stages of the OTA to enhance the bandwidth and allow the use of smaller compensation capacitors.
Abstract: An operational-transconductance-amplifier (OTA) design for low-voltage low-power applications is proposed. The proposed OTA incorporates bulk-driven MOS transistors in the pseudo differential pair of the input stage to concurrently enable low voltage operation and rail-to-rail input range. Using a common-mode feedforward (CMFF) circuit in the first stage to bias the following stages of the OTA obviates the need for extra biasing circuitry and improves the performance of the OTA. To further enhance the bandwidth and allow the use of smaller compensation capacitors, a compensation network based on a damping factor control circuit is exploited. To verify the theoretical findings, the OTA was fabricated in a 65 nm CMOS technology. Measurements show that the OTA provides a low-frequency gain of 46 dB at Vdd = 0.5 V, and a gain of 43 dB at Vdd = 0.35 V. The power dissipation is 182 μW at Vdd = 0.5 V, and 17 μW at Vdd = 0.35 V.

6 citations

Proceedings ArticleDOI
16 Jun 2013
TL;DR: The detailed analysis and simulation in this paper facilitate the selection of the loop filter that results in the optimum performance.
Abstract: This paper presents an analytical and comparative study on the design of the loop filter in frequency synthesizer Phase Locked Loops (PLLs). Loop filter design involves the selection of topology, type, order, poles ratio, noise contribution, and loop stability. The trade-offs involved in the design are elucidated and analyzed. The detailed analysis and simulation in this paper facilitate the selection of the loop filter that results in the optimum performance. Components selection through mathematical derivation and filter design tables is demonstrated.

5 citations

07 Oct 2010
TL;DR: Two architectures for direct conversion from analog-to-residue from residue and vice versa are presented and the performance of the proposed schemes is analyzed.
Abstract: Residue Number System (RNS) based processors offer several advantages in terms of speed and power. The embedded parallel processing property of RNS with the absence of carry propagation makes it very suitable for long word addition and multiplication intensive algorithms. The conversion from real world analog signals to residue and vice versa plays a crucial role in the overall performance of the system. In this paper, we present two architectures for direct conversion from analog-to-residue. The performance of the proposed schemes is analyzed.

5 citations

Proceedings ArticleDOI
01 Dec 2010
TL;DR: The proposed architecture, based on the Chinese Remainder Theorem, eliminates the need of conversion to binary encoding as an intermediate stage and is useful for direct interaction of residual arithmetic-based signal processing with the analog world.
Abstract: Residue Number System (RNS) allows parallel digital signal processing due to the absence of carry propagation between its arithmetic units. The RNS implementation results in great performance in terms of speed and power, especially when recursive multiply-and-accumulate operations are required. In this paper, we propose a direct residue-to-analog conversion architecture. The proposed architecture, based on the Chinese Remainder Theorem, eliminates the need of conversion to binary encoding as an intermediate stage. The proposed converter is useful for direct interaction of residual arithmetic-based signal processing with the analog world.

4 citations


Cited by
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01 Jan 2016
TL;DR: The design of analog cmos integrated circuits is universally compatible with any devices to read and is available in the book collection an online access to it is set as public so you can download it instantly.
Abstract: Thank you for downloading design of analog cmos integrated circuits. Maybe you have knowledge that, people have look hundreds times for their chosen books like this design of analog cmos integrated circuits, but end up in malicious downloads. Rather than enjoying a good book with a cup of coffee in the afternoon, instead they juggled with some harmful virus inside their computer. design of analog cmos integrated circuits is available in our book collection an online access to it is set as public so you can download it instantly. Our digital library spans in multiple countries, allowing you to get the most less latency time to download any of our books like this one. Kindly say, the design of analog cmos integrated circuits is universally compatible with any devices to read.

1,038 citations

Book ChapterDOI
01 Jan 2003
TL;DR: In this paper, an expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems.
Abstract: This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

207 citations

Journal ArticleDOI
TL;DR: Overall good large-Signal and small-signal performances are achieved, making the solution extremely competitive in comparison to the state of the art.
Abstract: A simple high-performance architecture for bulk-driven operational transconductance amplifiers (OTAs) is presented. The solution, suitable for operation under sub 1-V single supply, is made up of three gain stages and, as an additional feature, provides inherent class-AB behavior with accurate and robust standby current control. The OTA is fabricated in a 180-nm standard CMOS technology, occupies an area of $19.8\cdot 10^{-3}\ \text{mm}^{2}$ and is powered from 0.7 V with a standby current consumption of around 36 $\mu\text{A}$ . DC gain and unity gain frequency are 57 dB and 3 MHz, respectively, under a capacitive load of 20 pF. Overall good large-signal and small-signal performances are achieved, making the solution extremely competitive in comparison to the state of the art.

100 citations

Journal ArticleDOI
TL;DR: A simple class AB power-efficient ULV structure has been obtained, which can operate from supply voltages less than the threshold voltages of the employed MOS transistors, while offering rail-to-rail input common-mode range at the same time.
Abstract: In this article, a new solution for an ultralow-voltage (ULV) ultralow-power (ULP) operational transconductance amplifier (OTA) is presented. Thanks to the combination of a low-voltage bulk-driven nontailed differential stage with the multipath Miller zero compensation technique, a simple class AB power-efficient ULV structure has been obtained, which can operate from supply voltages less than the threshold voltages of the employed MOS transistors, while offering rail-to-rail input common-mode range at the same time. The proposed OTA was fabricated using the 180-nm CMOS process from Taiwan Semiconductor Manufacturing Company (TSMC) and can operate from $V_{\mathbf {DD}}$ ranging from 0.3 to 0.5 V. The 0.3-V version dissipates only 12.6 nW of power while showing a 64.7-dB voltage gain at 1-Hz, 2.96-kHz gain-bandwidth product, and a 4.15-V/ms average slew-rate at 30-pF load capacitance. The measured results agree well with simulations.

53 citations