Author

# P. K. Sinha Roy

Bio: P. K. Sinha Roy is an academic researcher. The author has contributed to research in topics: Function (mathematics) & Realization (systems). The author has an hindex of 2, co-authored 3 publications receiving 5 citations.

##### Papers

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TL;DR: In this paper, a method of directly testing whether the AND-OR or OR-AND form of a switching function is more economic for some simple cases is presented, and simplified expressions leading to economic three-level synthesis have also been derived.

Abstract: A method of directly testing whether the AND-OR or the OR-AND form of a switching function is more economic for some simple cases is presented. Simplified expressions leading to economic three-level synthesis have also been derived.

3 citations

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TL;DR: In this article, a test and realization procedure for linearly separable switching functions using the decimal number representation of the input variable combinations is presented, which is usable for switching functions of eight or lesser number of variables.

Abstract: A switching function is said to be linearly separable if the weighted sum of the input variables of the logical element realizing the function equals or exceeds a threshold. The weights and threshold are all real numbers. All switching functions are not linearly separable. A test and realization procedure for linearly separable switching functions using the decimal number representation of the input variable combinations only is presented here. The test process uses the 2-asummability property of linearly separable switching functions and is usable for switching functions of eight or lesser number of variables. A slide-rule device is described where the test can be mechanically done promptly. The realization technique is iterative and gives integral solutions directly. The method is straightforward and is very useful, particularly for a small number of variables.

2 citations

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TL;DR: A method of test and realization of non-linearly separable switching functions that are 2-rcalizable, i.e. realizable by a network of 2-threshold logic elements is presented.

Abstract: In this paper a method of test and realization of non-linearly separable switching functions that are 2-rcalizable, i.e. realizable by a network of 2-threshold logic elements is presented. The positive linear dependences among the rows of the coefficient matrix of the set of inequalities representing the function are first determined and systematically removed using a distribution table. All possible solutions are readily obtained. A weight matrix representation of a network of threshold logic elements is used. An example is worked out.

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01 Aug 2017

TL;DR: In this article, a ripple carry adder using majority gate based CMOS output wired logic is implemented, the carry from each stage is fed to the next stage as carry input and the sum and carry outputs are obtained using output wired CMOS logic based majority gate.

Abstract: A new technique of Ripple carry adder using majority gate based CMOS output wired logic is implemented. The ripple carry adder consists of four Full adder blocks. The carry from each stage is fed to the next stage as carry input. The Sum and carry outputs are obtained using output wired CMOS logic based majority gate. The number of transistors used in the proposed circuit design is less as compared to the conventional ripple carry adder circuit. The major advantage is its less delay. The design has been verified using tanner tool.

4 citations

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01 Nov 2017TL;DR: The transistor count for the proposed design of carry look ahead adder is less than the conventional design, which has the major advantage of its fast computation and less power consumption and delay.

Abstract: Carry look ahead adder has been designed in the paper using the concept of majority gate and output wired logic. The circuit is designed for two bits and the power delay product is calculated for the carry look ahead adder. The transistor count for the proposed design of carry look ahead adder is less than the conventional design. The major advantage of the design is its fast computation and less power consumption and delay. The design has been verified using tanner tool.

3 citations

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TL;DR: In this paper, a simple and straightforward procedure for finding absolute minimal third-order expressions (in the sum-ofproduct-of-sum) of a special class of Boolean functions called unate functions is suggested.

Abstract: A simple and straightforward procedure for finding absolute minimal third-order expressions (in the ‘ sum-of-product-of-sum’ forms) of a special class of Boolean functions called unate functions is suggested in the paper. The central idea developed through the procedure involves a decomposition of the assigned Boolean function first into a group of sub-functions called maximal uniliteral sub-functions (MTJL's) each of which is realizable in a minimal second-order ‘ product-of-sum ’ form and then a selection of an appropriate sub-set of these maximal uniliteral sub-functions or MUL's (or their sub-functions) in order to cover all the prime implicants of the function minimally.

2 citations

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TL;DR: The second-order expressions of Boolean functions can have either sum-ofproduct or product-of-sum forms, and the concept of coincidence between the p terms of the function is introduced in this article.

Abstract: The second-order expressions of Boolean functions can have either sum-of-product or product-of-sum forms For a Boolean function specified in the irredundant sum-of-product form as the disjunction of a number of prime implicants or p terms, groups of these p terms can sometimes be more economically realized in the minimal product-of-sum forms than in the sum-of-product forms To know whether a group of p terms in the irredundant sum-of-product form of the function has a more economic realization in the product-of-sum form, the concept of coincidence between the p terms of the function is introduced in the paper and a number of interesting properties of the function in relation to coincidence are established The coincidence between a pair of p terms in a function is defined as the number of literals occurring as mutually common in their algebraic representations It is next shown that the study of the properties of Boolean functions in relation to coincidence also aids in readily obtaining the economic th

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TL;DR: In this paper, a technique for obtaining the product of sum expression from the sum of product expression of a Boolean function is presented, where a tabular representation is made with the product terms and the variables present in the function specified in the sum-of-product form and appropriate rows of the table are combined to give different sum terms.

Abstract: A technique has been developed in this article for obtaining the ‘ product of sum ’ expression from the ‘ sum of product ’ expression of a Boolean function. In this technique, first a tabular representation is made with the product terms and the variables present in the function specified in the ‘ sum of product ’ form and then appropriate rows of the table are combined to give different sum terms. The idea of the technique has also been extended for obtaining the third-order minimal expression of a Boolean function.