P. K. Thakur

Bio: P. K. Thakur is an academic researcher from Indian Institute of Science. The author has contributed to research in topics: Poisson's equation & Poisson distribution. The author has an hindex of 5, co-authored 6 publications receiving 103 citations. Previous affiliations of P. K. Thakur include University of California, Berkeley.

BSIM — Industry standard compact MOSFET models

Abstract: BSIM compact models have served industry for more than a decade starting with BSIM3 and later BSIM4 and BSIMSOI. Here we will briefly discuss the ongoing work on current and future device models in BSIM group. BSIM6 is the next generation bulk RF MOSFET Model which uses charge based core with physical models adapted from BSIM4. Model fulfills all symmetry tests and shows correct slopes for harmonics. The BSIM-CMG and BSIM-IMG are the surface potential based models for multi-gate MOSFETs. The BSIM-CMG model has been developed to model common symmetric double, triple, quadruple and surround gate MOSFET. The BSIM-IMG model has been developed to model independent double-gate MOSFET capturing threshold voltage variation with back gate bias. Models include all read device effects like SCE, DIBL, mobility degradation, poly depletion, QME etc.

A Computationally Efficient Generalized Poisson Solution for Independent Double-Gate Transistors

Abstract: Previous techniques used for solving the 1-D Poisson equation (PE) rigorously for long-channel asymmetric and independent double-gate (IDG) transistors result in potential models that involve multiple intercoupled implicit equations. As these equations need to be solved self-consistently, such potential models are clearly inefficient for compact modeling. This paper reports a different rigorous technique for solving the same PE by which one can obtain the potential profile of a generalized IDG transistor that involves a single implicit equation. The proposed Poisson solution is shown to be computationally more efficient for circuit simulation than the previous solutions.

BSIM6: Symmetric bulk MOSFET model

Abstract: BSIM6 Model is the next generation Bulk RF MOSFET Model. Model uses charge based core with all physical models adapted from BSIM4 model. Model fulfills all quality tests e.g. Gummel symmetry and AC symmetry test and shows correct slopes for harmonic balance simulation. Model has been tested in DC, small signal, transient and RF simulation and shows excellent convergence in circuit simulation. Model is under standardization at Compact Model Council.

Large-Signal Model for Independent DG MOSFET

Abstract: In this paper, we show the limitations of the traditional charge linearization techniques for modeling terminal charges of the independent double-gate metal-oxide-semiconductor field-effect transistors. Based on our recent computationally efficient Poisson solution for independent double gate transistors, we propose a new charge linearization technique to model the terminal charges and transcapacitances. We report two different types of quasistatic large-signal models for the long-channel device. In the first type, the terminal charges are expressed as closed-form functions of the source- and drain-end inversion charge densities and found to be accurate when the potential distribution at source end of the channel is hyperbolic in nature. The second type, which is found to be accurate in all regimes of operations, is based on the quadratic spline collocation technique and requires the input voltage equation to be solved two more times, apart from the source and drain ends.

Bipolar Poisson Solution for Independent Double-Gate MOSFET

Abstract: We propose a new set of input voltage equations (IVEs) for independent double-gate MOSFET by solving the governing bipolar Poisson equation (PE) rigorously The proposed IVEs, which involve the Legendre's incomplete elliptic integral of the first kind and Jacobian elliptic functions and are valid from accumulation to inversion regimes, are shown to have good agreement with the numerical solution of the same PE for all bias conditions

BSIM—SPICE Models Enable FinFET and UTB IC Designs

Abstract: Two turn-key surface potential-based compact models are developed to simulate multigate transistors for integrated circuit (IC) designs. The BSIM-CMG (common-multigate) model is developed to simulate double-, triple-, and all-around-gate FinFETs and it is selected as the world's first industry-standard compact model for the FinFET. The BSIM-IMG (independent-multigate) model is developed for independent double-gate, ultrathin body (UTB) transistors, capturing the dynamic threshold voltage adjustment with back gate bias. Starting from long-channel devices, the basic models are first obtained using a Poisson-carrier transport approach. The basic models agree with the results of numerical two-dimensional device simulators. The real-device effects then augment the basic models. All the important real-device effects, such as short-channel effects (SCEs), quantum mechanical confinement effects, mobility degradation, and parasitics are included in the models. BSIM-CMG and BSIM-IMG have been validated with hardware silicon-based data from multiple technologies. The developed models also meet the stringent quality assurance tests expected of production level models.

BSIM6: Analog and RF Compact Model for Bulk MOSFET

Abstract: BSIM6 is the latest industry-standard bulk MOSFET model from the BSIM group developed specially for accurate analog and RF circuit designs. The popular real-device effects have been brought from BSIM4. The model shows excellent source-drain symmetry during both dc and small signal analysis, thus giving excellent results during analog and RF circuit simulations, e.g., harmonic balance simulation. The model is fully scalable with geometry, biases, and temperature. The model has a physical charge-based capacitance model including polydepletion and quantum-mechanical effect thereby giving accurate results in small signal and transient simulations. The BSIM6 model has been extensively validated with industry data from 40-nm technology node.

BSIM-IMG: A Compact Model for Ultrathin-Body SOI MOSFETs With Back-Gate Control

Abstract: In this paper, we present an accurate and computationally efficient model for circuit simulation of ultrathin-body silicon-on-insulator MOSFETs with strong back-gate control. This work advances previous works in terms of numerical accuracy, computational efficiency, and behavior of the higher order derivatives of the drain current. We propose a consistent analytical solution for the calculation of front- and back-gate surface potentials and inversion charge. The accuracy of our surface potential calculation is on the order of nanovolts. The drain current model includes velocity saturation, channel-length modulation, mobility degradation, quantum confinement effect, drain-induced barrier lowering, and self-heating effect. The model has correct behavior for derivatives of the drain current and shows an excellent agreement with experimental data for long- and short-channel devices with 8-nm-thin silicon body and 10-nm-thin BOX.

Tensor Computation: A New Framework for High-Dimensional Problems in EDA

Abstract: Many critical electronic design automation (EDA) problems suffer from the curse of dimensionality, i.e., the very fast-scaling computational burden produced by large number of parameters and/or unknown variables. This phenomenon may be caused by multiple spatial or temporal factors (e.g., 3-D field solvers discretizations and multirate circuit simulation), nonlinearity of devices and circuits, large number of design or optimization parameters (e.g., full-chip routing/placement and circuit sizing), or extensive process variations (e.g., variability /reliability analysis and design for manufacturability). The computational challenges generated by such high-dimensional problems are generally hard to handle efficiently with traditional EDA core algorithms that are based on matrix and vector computation. This paper presents “tensor computation” as an alternative general framework for the development of efficient EDA algorithms and tools. A tensor is a high-dimensional generalization of a matrix and a vector, and is a natural choice for both storing and solving efficiently high-dimensional EDA problems. This paper gives a basic tutorial on tensors, demonstrates some recent examples of EDA applications (e.g., nonlinear circuit modeling and high-dimensional uncertainty quantification), and suggests further open EDA problems where the use of tensor computation could be of advantage.

Leti-UTSOI2.1: A Compact Model for UTBB-FDSOI Technologies—Part I: Interface Potentials Analytical Model

Abstract: A detailed presentation of the latest version of the Leti-UTSOI compact model is provided. Leti-UTSOI2 is the first available model able to describe the behavior of low-doped ultrathin body and buried oxide fully depleted silicon-on-insulator transistors in all bias configurations, including strong forward back bias. In this part, a full analytical calculation of interface potentials, valid for all regimes of independent double-gate device operation, is detailed. This analytical computation, which is the heart of Leti-UTSOI2, provides explicit expressions for all quantities required to build dc and ac core models.