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Patrick S. Goley

Other affiliations: Virginia Tech
Bio: Patrick S. Goley is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Molecular beam epitaxy & Heterojunction. The author has an hindex of 8, co-authored 26 publications receiving 273 citations. Previous affiliations of Patrick S. Goley include Virginia Tech.

Papers
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Journal ArticleDOI
TL;DR: In this paper, optical single-event transients (OSETs) were measured for the first time in integrated silicon-photonic waveguides, and the authors showed that the fractional (or percent) extinction of the optical power in the waveguide due to an OSET is dependent on the number of injected EHPs.
Abstract: Optical single-event transients (OSETs) were measured for the first time in integrated silicon-photonic waveguides. A custom test fixture and novel experimental setup were used at the U.S. Naval Research Laboratory to induce a dense cloud of electron–hole pairs (EHPs) in a waveguide by the two-photon absorption process. Experimental data showed that the fractional (or percent) extinction of the optical power in the waveguide due to an OSET is dependent on the number of injected EHPs. This fractional extinction was also shown to be constant regardless of the optical power level in the waveguide. These OSETs are a direct result of a reduction in the optical transmission ratio due to transient free-carrier absorption. The peak of the largest measured OSET degraded the transmission ratio by 15%, which, according to simulations, corresponds to roughly $9\times 10^{19}$ cm−3 peak EHP generation. Simulation results suggest that the EHP density levels generated by heavy ions in space could potentially cause up to 100% fractional extinction of light in the waveguide, that is, total loss of the optical signal. A simulation technique to predict the OSET effects in any arbitrary photonic circuit is shown. Here, an electrooptic modulator was used as an example. The results of this study pose concerns for use of integrated silicon photonics for radiation-intensive applications.

9 citations

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TL;DR: The epitaxial Ge grown on Si using AlAs/GaAs buffer architecture is a promising candidate for next-generation energy-efficient fin field-effect transistor applications.
Abstract: The magnetotransport properties of epitaxial Ge/AlAs heterostructures with different growth conditions and substrate architectures have been studied under ±9 T magnetic field and at 390 mK temperature. Systematic mobility measurements of germanium (Ge) epilayers grown on GaAs substrates at growth temperatures from 350 to 450 °C allow us to extract a precise growth window for device-quality Ge, corroborated by structural and morphological properties. Our results on Si substrate using a composite metamorphic AlAs/GaAs buffer at 400 °C Ge growth temperature, show that the Ge/AlAs system can be tailored to have a single carrier transport while keeping the charge solely in the Ge layer. Single carrier transport confined to the Ge layer is demonstrated by the weak-localization quantum correction to the conductivity observed at low magnetic fields and 390 mK temperature. The weak localization effect points to a near-absence of spin-orbit interaction for carriers in the electronically active layer and is used here for the first time to pinpoint Ge as this active layer. Thus, the epitaxial Ge grown on Si using AlAs/GaAs buffer architecture is a promising candidate for next-generation energy-efficient fin field-effect transistor applications.

8 citations

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TL;DR: In this paper, mixed-anion, GaAs1-ySby metamorphic materials with a wide range of antimony (Sb) compositions extending from 15% to 62%, were grown by solid source molecular beam epitaxy (MBE) on GaAs substrates.
Abstract: Mixed-anion, GaAs1-ySby metamorphic materials with a wide range of antimony (Sb) compositions extending from 15% to 62%, were grown by solid source molecular beam epitaxy (MBE) on GaAs substrates. The impact of different growth parameters on the Sb composition in GaAs1-ySby materials was systemically investigated. The Sb composition was well-controlled by carefully optimizing the As/Ga ratio, the Sb/Ga ratio, and the substrate temperature during the MBE growth process. High-resolution x-ray diffraction demonstrated a quasi-complete strain relaxation within each composition of GaAs1-ySby. Atomic force microscopy exhibited smooth surface morphologies across the wide range of Sb compositions in the GaAs1-ySby structures. Selected high-κ dielectric materials, Al2O3, HfO2, and Ta2O5 were deposited using atomic layer deposition on the GaAs0.38Sb0.62 material, and their respective band alignment properties were investigated by x-ray photoelectron spectroscopy (XPS). Detailed XPS analysis revealed a valence band ...

6 citations

Journal ArticleDOI
Mantu K. Hudait1, Yan Zhu, Patrick S. Goley, Michael Clavel, Nikhil Jain 
TL;DR: In this article, a step-graded mixed-anion GaAs1−ySby buffer with a lattice misfit of >12% on a 6° off-cut (100) Si substrate grown by molecular beam epitaxy (MBE) was investigated.
Abstract: The growth, strain relaxation, and defect properties of a step-graded mixed-anion GaAs1−ySby buffer with a lattice misfit of >12% on a 6° off-cut (100) Si substrate grown by molecular beam epitaxy (MBE) have been investigated. This metamorphic graded buffer exhibited efficient strain relaxation and low threading dislocation densities of ≤107 cm−2 in the investigated range of misfits. High-resolution X-ray diffraction measurement demonstrated nearly ideal strain relaxation behavior with a surface rms roughness of ~3.5 nm, which is attributed in part to dislocation glide. Thus, MBE-grown GaAs1−ySby anion-graded buffers are a promising "virtual substrate" technology for extending the performance and application of 6.1 A device technology.

6 citations

Journal ArticleDOI
17 Aug 2020
TL;DR: In this article, a double-period InAs/GaSb superlattice grown by solid-source molecular beam epitaxy is presented, which shows abrupt atomic transitions between each Sb- or As-containing epilayer.
Abstract: Properties of a double-period InAs/GaSb superlattice grown by solid-source molecular beam epitaxy are presented. Precise growth conditions at the InAs/GaSb heterojunction yielded abrupt heterointerfaces and superior material quality as verified by X-ray diffraction and transmission electron microscopy (TEM) analysis. Moreover, high-resolution TEM imaging and elemental composition profiling of the InAs/GaSb heterostructure demonstrated abrupt atomic transitions between each Sb- or As-containing epilayer. An 8 × 8 k·p model is used to compute the electronic band structure of the constituent long- and short-period superlattices, taking into account the effects of conduction and valence band mixing, quantum confinement, pseudomorphic strain, and magnetic field on the calculated dispersions. Magnetotransport measurements over a variable temperature range (390 mK to 294 K) show anisotropic transport exhibiting a striking magnetoresistance and show Shubnikov-de Haas oscillations, the latter being indicative of high quality material synthesis. The measurements also reveal the existence of at least two carrier populations contributing to in-plane conductance in the structure.

5 citations


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TL;DR: In this article, a review of the high-K gate stack is presented, including the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging.
Abstract: The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current becomes too large. This led to the replacement of SiO2 by a physically thicker layer of a higher dielectric constant or ‘high-K’ oxide such as hafnium oxide. Intensive research was carried out to develop these oxides into high quality electronic materials. In addition, the incorporation of Ge in the CMOS transistor structure has been employed to enable higher carrier mobility and performance. This review covers both scientific and technological issues related to the high-K gate stack – the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging to achieve the thinnest oxide thicknesses. The high K oxides were implemented in conjunction with a replacement of polycrystalline Si gate electrodes with metal gates. The strong metallurgical interactions between the gate electrodes and the HfO2 which resulted an unstable gate threshold voltage resulted in the use of the lower temperature ‘gate last’ process flow, in addition to the standard ‘gate first’ approach. Work function control by metal gate electrodes and by oxide dipole layers is discussed. The problems associated with high K oxides on Ge channels are also discussed.

512 citations

Journal ArticleDOI
TL;DR: An interesting coincidence of a critical thickness of 10 nm was identified in both the CVD growth behavior and in the breakdown electric field strength and leakage current mechanism, indicating that the electrical properties of the cVD h-BN film depended significantly on the film growth mode and the resultant film quality.
Abstract: Two different growth modes of large-area hexagonal boron nitride (h-BN) film, a conventional chemical vapor deposition (CVD) growth mode and a high-pressure CVD growth mode, were compared as a function of the precursor partial pressure. Conventional self-limited CVD growth was obtained below a critical partial pressure of the borazine precursor, whereas a thick h-BN layer (thicker than a critical thickness of 10 nm) was grown beyond a critical partial pressure. An interesting coincidence of a critical thickness of 10 nm was identified in both the CVD growth behavior and in the breakdown electric field strength and leakage current mechanism, indicating that the electrical properties of the CVD h-BN film depended significantly on the film growth mode and the resultant film quality.

116 citations

Journal ArticleDOI
TL;DR: A low-temperature hybrid co-integration of one-transistor-one-resistor memory cell, comprising a surface functionalized 2D WSe2 p-FET, with a solution-processed WSe 2 Resistive Random Access Memory is demonstrated.
Abstract: 3D monolithic integration of logic and memory has been the most sought after solution to surpass the Von Neumann bottleneck, for which a low-temperature processed material system becomes inevitable. Two-dimensional materials, with their excellent electrical properties and low thermal budget are potential candidates. Here, we demonstrate a low-temperature hybrid co-integration of one-transistor-one-resistor memory cell, comprising a surface functionalized 2D WSe2 p-FET, with a solution-processed WSe2 Resistive Random Access Memory. The employed plasma oxidation technique results in a low Schottky barrier height of 25 meV with a mobility of 230 cm2 V−1 s−1, leading to a 100x performance enhanced WSe2 p-FET, while the defective WSe2 Resistive Random Access Memory exhibits a switching energy of 2.6 pJ per bit. Furthermore, guided by our device-circuit modelling, we propose vertically stacked channel FETs for high-density sub-0.01 μm2 memory cells, offering a new beyond-Si solution to enable 3-D embedded memories for future computing systems. Designing efficient, scalable and low-thermal-budget 2D Materials for 3D integration remains a challenge. Here, the authors report the development of a hybrid-(solution-processed-exfoliated) integration of 2D Material based 1T1R which uses a multilayer WSe2 p-FET and a multilayer printed WSe2 RRAM.

90 citations

Journal ArticleDOI
TL;DR: It is shown that the Coulomb interaction-induced self-energy corrections in real space are sufficiently nonlocal to be manipulated externally, but still local enough to induce spatially sharp interfaces within a single homogeneous monolayer to form heterojunctions.
Abstract: We propose to create lateral heterojunctions in two-dimensional materials based on nonlocal manipulations of the Coulomb interaction using structured dielectric environments. By means of ab initio calculations for MoS2 as well as generic semiconductor models, we show that the Coulomb interaction-induced self-energy corrections in real space are sufficiently nonlocal to be manipulated externally, but still local enough to induce spatially sharp interfaces within a single homogeneous monolayer to form heterojunctions. We find a type-II heterojunction band scheme promoted by a laterally structured dielectric environment, which exhibits a sharp band gap crossover within less than 5 unit cells.

85 citations

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TL;DR: A high-yield and high-throughput method is used to demonstrate nanometer-thin photodetectors with significantly enhanced light absorption based on nanocavity interference mechanism, which exhibit unique optoelectronic properties, such as the strong field effect and spectral selectivity.
Abstract: Miniaturization of optoelectronic devices offers tremendous performance gain. As the volume of photoactive material decreases, optoelectronic performance improves, including the operation speed, the signal-to-noise ratio, and the internal quantum efficiency. Over the past decades, researchers have managed to reduce the volume of photoactive materials in solar cells and photodetectors by orders of magnitude. However, two issues arise when one continues to thin down the photoactive layers to the nanometer scale (for example, <50 nm). First, light-matter interaction becomes weak, resulting in incomplete photon absorption and low quantum efficiency. Second, it is difficult to obtain ultrathin materials with single-crystalline quality. We introduce a method to overcome these two challenges simultaneously. It uses conventional bulk semiconductor wafers, such as Si, Ge, and GaAs, to realize single-crystalline films on foreign substrates that are designed for enhanced light-matter interaction. We use a high-yield and high-throughput method to demonstrate nanometer-thin photodetectors with significantly enhanced light absorption based on nanocavity interference mechanism. These single-crystalline nanomembrane photodetectors also exhibit unique optoelectronic properties, such as the strong field effect and spectral selectivity.

74 citations