Peng Li

Bio: Peng Li is an academic researcher from East Carolina University. The author has contributed to research in topics: Virtual machine & Virtualization. The author has an hindex of 12, co-authored 33 publications receiving 397 citations. Previous affiliations of Peng Li include University of Connecticut.

Selecting and using virtualization solutions: our experiences with VMware and VirtualBox

Abstract: Virtualization provides a cost-effective solution for delivering hands-on education remotely. Various virtualization software packages are currently available. In this paper, we present our experiences with selecting and using virtualization technology for information and computer technology courses. VMware and VirtualBox are both viable choices with their advantages and disadvantages.

Removal of threading dislocations from patterned heteroepitaxial semiconductors by glide to sidewalls

Abstract: We have shown that threading dislocations can be removed from patterned heteroepitaxial semiconductors by glide to the sidewalls, which is driven by the presence of image forces. In principle, it should be possible to attain highly mismatched heteroepitaxial semiconductors which are completely free from threading dislocations, even though they are not pseudomorphic, by patterned heteroepitaxial processing. There are two basic approaches to patterned heteroepitaxial processing. The first involves selective area growth on a pre-patterned substrate. The second approach involves post-growth patterning followed by annealing. We have developed a quantitative model which predicts that there is a maximum lateral dimension for complete removal of threading dislocations by patterned heteroepitaxy. According to our model, this maximum lateral dimension is proportional to the layer thickness and increases monotonically with the lattice mismatch. For heteroepitaxial materials with greater than 1% lattice mismatch, our model predicts that practical device-sized threading dislocation-free regions may be realized by patterned heteroepitaxial processing.

X-ray characterization of dislocation density asymmetries in heteroepitaxial semiconductors

Abstract: We demonstrate an x-ray rocking curve method which allows detection of an asymmetry in the dislocation densities in an heteroepitaxial (001) zinc blende semiconductor layer. These dislocations exist on two types of slip systems with their misfit dislocation line segments oriented along either a [1−10] direction (type A) or a [110] direction (type B). An imbalance in the densities of dislocations on these slip systems produces an observable azimuthal variation in the rocking curve width for symmetric x-ray reflections. An approximate quantitative model allows the estimation of the dislocation densities on the two types of slip systems.

Experiencing virtual computing lab in information technology education

Abstract: Virtual Computing Lab (VCL) is an open source remote access scheduling and image management system developed at North Carolina State University (NCSU). East Carolina University (ECU), partnered with NCSU and IBM to provide innovative centralized remote computer and software access to both faculty and students under the Virtual Computing Initiative. VCL was used in several information and computer technology courses for resource-intensive labs. VCL extended the boundary of learning from the traditional physical laboratory to the homes of the students. The students could study anytime, anyplace and at their own pace. As a centralized remote lab service, VCL was complementary to decentralized virtual labs which were performed on students' personal computers. Preliminary feedback indicated that the VCL system helped provide students a useable and useful online digital learning environment.

Integration of virtualization technology into network security laboratory

Abstract: Distance education has witnessed a tremendous growth in the past decade. Advances in Internet technologies have made it possible to deliver not only lectures, but also hands-on labs remotely. Virtualization technology enables multiple virtual machines and their applications to run simultaneously on a single physical computer. This eliminates the need to have multiple physical machines host diverse operating systems typically deployed in remote network security labs. In preparation for a course on intrusion detection systems (IDS), the instructor creates pre-configured virtual machines and network trace files for studentspsila use. These virtual machines are then installed by the students on their personal computers at home and used to conduct lab exercises. The virtual lab approach is different from the centralized remote laboratory because students run the lab on their own computers and do not depend on the remote servers. Additionally, the virtual environments allow rapid changes to be made to the lab exercises or environments thus allowing instruction with up-to-date technologies. Furthermore, the burden of maintaining centralized physical labs has been lifted from the institutionpsilas shoulders. Our approach to decentralized virtual lab-based distance education has been well received by our students.

Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication

Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

Defect reduction of selective Ge epitaxy in trenches on Si(001) substrates using aspect ratio trapping

Abstract: Defect-free germanium has been demonstrated in SiO2 trenches on silicon via Aspect Ratio Trapping, whereby defects arising from lattice mismatch are trapped by laterally confining sidewalls. Results were achieved through a combination of conventional photolithography, reactive ion etching of SiO2, and selective growth of Ge as thin as 450nm. Full trapping of dislocations originating at the Ge∕Si interface has been demonstrated for trenches up to 400nm wide without the additional formation of defects at the sidewalls. This approach shows great promise for the integration of Ge and/or III-V materials, sufficiently large for key device applications, onto silicon substrates.

InP-Based Transistor Fabrication

Abstract: Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP.

Tri-gate field-effect transistors formed by aspect ratio trapping

Abstract: Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.

Quantum dot lasers for silicon photonics [Invited]

Abstract: We review recent advances in the field of quantum dot lasers on silicon. A summary of device performance, reliability, and comparison with similar quantum well lasers grown on silicon will be presented. We consider the possibility of scalable, low size, weight, and power nanolasers grown on silicon enabled by quantum dot active regions for future short-reach silicon photonics interconnects.