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Author

Peter H. Wilson

Other affiliations: National Research Council
Bio: Peter H. Wilson is an academic researcher from Fairchild Semiconductor International, Inc.. The author has contributed to research in topics: Trench & Quantum well infrared photodetector. The author has an hindex of 13, co-authored 37 publications receiving 1300 citations. Previous affiliations of Peter H. Wilson include National Research Council.

Papers
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Patent
31 May 2006
TL;DR: In this article, a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance.
Abstract: Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

664 citations

Patent
15 Feb 2008
TL;DR: In this paper, a conformal oxide film is used to fill the bottom of a trench formed in a semiconductor substrate and cover a top surface of the substrate, and then the oxide film can be etched off the top surface and inside the trench to leave a substantially flat layer of oxide having a target thickness at bottom of the trench.
Abstract: A method for forming thick oxide at the bottom of a trench formed in a semiconductor substrate includes forming a conformal oxide film that fills the trench and covers a top surface of the substrate. and etching the oxide film off the top surface of the substrate and inside the trench to leave a substantially flat layer of oxide having a target thickness at the bottom of the trench. The oxide film can be deposited by sub-atmospheric chemical vapor deposition processes, directional Tetraethoxysilate (TEOS) processes, or high density plasma deposition processes that form a thicker oxide at the bottom of the trench than on the sidewalls of the trench.

120 citations

Patent
08 Jul 2009
TL;DR: The TG-LDMOSFET as discussed by the authors provides devices with an asymmetric oxide in the trench gate, as well as LDD regions that lower the gate-drain capacitance for improved RF performance.
Abstract: MOSFET devices for RF applications that use a trench-gate in place of the lateral gate conventionally used in lateral MOSFET devices. A trench-gate provides devices with a single, short channel for high frequency gain. Embodiments of the present invention provide devices with an asymmetric oxide in the trench gate, as well as LDD regions that lower the gate-drain capacitance for improved RF performance. Refinements to these TG-LDMOS devices include placing a source-shield conductor below the gate and placing two gates in a trench-gate region. These improve device high-frequency performance by decreasing gate-to-drain capacitance. Further refinements include adding a charge balance region to the LDD region and adding source-to-substrate or drain-to-substrate vias.

86 citations

Patent
03 Oct 2002
TL;DR: In this paper, a MOSFET device for RF applications that uses a trench gate in place of the lateral gate used in lateral MOS-FET devices is described, which is provided with a single, short channel for high frequency gain.
Abstract: A MOSFET device for RF applications that uses a trench gate in place of the lateral gate used in lateral MOSFET devices is described. The trench gate in the devices of the invention is provided with a single, short channel for high frequency gain. The device of the invention is also provided with an asymmetric oxide in the trench gate, as well as LDD regions that lower the gate-drain capacitance for improved RF performance. Such features allow these devices to maintain the advantages of the LDMOS structure (better linearity), thereby increasing the RF power gain. The trench gate LDMOS of the invention also reduces the hot carrier effects when compared to regular LDMOS devices by reducing the peak electric field and impact ionization. Thus, the devices of the invention will have a better breakdown capability.

62 citations

Patent
18 Jul 2002
TL;DR: In this article, a MOSFET includes at least two insulation-filled trench regions laterally spaced in a first semiconductor region to form a drift region there between, and at least one resistive element located along an outer periphery of each of the two insulation filled trench regions.
Abstract: In accordance with an embodiment of the present invention, a MOSFET includes at least two insulation-filled trench regions laterally spaced in a first semiconductor region to form a drift region therebetween, and at least one resistive element located along an outer periphery of each of the two insulation-filled trench regions. A ratio of a width of each of the insulation-filled trench regions to a width of the drift region is adjusted so that an output capacitance of the MOSFET is minimized.

57 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Patent
23 Jan 2007
TL;DR: In this paper, a gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell, and a buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode.
Abstract: A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

609 citations

Patent
29 Jun 2007
TL;DR: In this article, the authors proposed a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost.
Abstract: An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

323 citations

Patent
11 May 2007
TL;DR: In this article, a method for fabricating a semiconductor device, in which a lifting phenomenon can be prevented from occurring in forming an amorphous carbon film on an etched layer having tensile stress, was proposed.
Abstract: A method for fabricating a semiconductor device, in which a lifting phenomenon can be prevented from occurring in forming an amorphous carbon film on an etched layer having tensile stress. According to the invention, since a compression stress on the etched layer or the amorphous carbon film can be reduced or a compression stress film is formed between the etched layer or the amorphous carbon film to prevent a lifting phenomenon from occurring and thus another pattern can be formed to fabricate a highly integrated semiconductor device.

212 citations

Journal ArticleDOI
16 Apr 2013-Sensors
TL;DR: This paper reviews the progress made in all of the quantum-based IR systems over the last decade plus, compares the relative merits of the systems as they stand now, and discusses where some of the leading research groups in these fields are going to take these technologies in the years to come.
Abstract: The first decade of the 21st-century has seen a rapid development in infrared photodetector technology. At the end of the last millennium there were two dominant IR systems, InSb- and HgCdTe-based detectors, which were well developed and available in commercial systems. While these two systems saw improvements over the last twelve years, their change has not nearly been as marked as that of the quantum-based detectors (i.e., QWIPs, QDIPs, DWELL-IPs, and SLS-based photodetectors). In this paper, we review the progress made in all of these systems over the last decade plus, compare the relative merits of the systems as they stand now, and discuss where some of the leading research groups in these fields are going to take these technologies in the years to come.

204 citations