Prabhu Shankar Kaliappan

Bio: Prabhu Shankar Kaliappan is an academic researcher from Brandenburg University of Technology. The author has contributed to research in topics: Communications protocol & Unified Modeling Language. The author has an hindex of 5, co-authored 9 publications receiving 65 citations.

Designing and Verifying Communication Protocols Using Model Driven Architecture and Spin Model Checker

Abstract: The need of communication protocols in today’s environment increases as much as the network explores. Many new kinds of protocols, e.g. for information sharing, security, etc., are being developed day-to-day which often leads to rapid, premature developments. Many protocols have not scaled to satisfy important properties like deadlock and livelock freedom, since MDA focuses on the rapid development rather than on the quality of the developed models. In order to fix the above, we introduce a 2-Phase strategy based on the UML state machine and sequence diagram. The state machine is converted into PROMELA code as a protocol model and its properties are derived from the sequence diagram as Linear Temporal Logic (LTL) through automation. The PROMELA code is interpreted through the SPIN model checker, which helps to simulate the behavior of protocol. Later the automated LTL properties are supplemented to the SPIN for the verification of protocol properties. The results are compared with the developed UML model and SPIN simulated model. Our test results impress the designer to verify the expected results with the system design and to identify the errors which are unnoticed during the design phase.

Designing and Verifying Communication Protocols Using Model Driven Architecture and Spin Model Checker

Abstract: The need of communication protocols in todaypsilas environment increases as much as the network explores. Many new kinds of protocols, e.g. for information sharing, security, etc., are being developed day-to-day which often leads to rapid, premature developments. Many protocols have not scaled to satisfy important properties like deadlock and livelock freedom, since MDA focuses on the rapid development rather than on the quality of the developed models. In order to fix the above, we introduce a 2-Phase strategy based on the UML state machine and sequence diagram to satisfy the properties of communication protocols. We convert these models into PROMELA code for execution on the SPIN model checker. The results are compared with the developed UML models.

Model-driven protocol design based on component oriented modeling

Abstract: Due to new emerging areas in the communication field there is a constant need for the design of novel communication protocols. This demands techniques for a rapid and efficient protocol design and development. Systematic protocol designs using formal description techniques (FDTs), such as SDL, LOTOS, etc., have proven a successful way to develop correct protocols. FDTs enforce, however, a semantic-oriented description which makes it difficult to reuse parts of the specification of other FDTs. A general-purpose modeling language like the UML may help to easily bridge between different description techniques. In contrast to the standardized FDTs, UML lacks a formal semantics. A model-driven protocol design, which aims at supporting the reuse of designs, makes only sense, when the designs of basic protocol mechanisms fit in reusable design patterns or components with a formally defined semantics. In this paper, we propose a component based protocol development approach with UML. Typical structures and behaviors of protocols are pre-defined as components using UML diagrams. The semantics of the UML diagrams is formally defined using the compositional Temporal Logic of Actions (cTLA). Based on this formalization, transformation into other presentations, e.g. PROMELA for verification, are supported. We demonstrate the approach for an example transfer protocol.

On the formalization of UML activities for component-based protocol design specifications

Abstract: Formal description techniques, such as Lotos and Sdl, have been proven as a successful means for developing communication protocols and distributed systems. Meanwhile the Unified Modeling Language (UML) has achieved wide acceptance. It is, however, less applied in the field of protocol design due to the lack of an appropriate formal semantics. In this paper we propose a formalization technique for UML activity diagrams using the compositional Temporal Logic of Actions (cTLA). We use cTLA because it can express correctness properties in temporal logic and can also be verified formally using several model checking mechanisms. The approach consists of two steps. First, we predefine the formal semantics of the most commonly used UML activity nodes using simple cTLA. In the second step we derive the functional semantics of the activity diagram by mapping it to a compositional cTLA process. We illustrate our approach for a connection set up as an example. Finally we present with the Activity to cTLA generator a tool to automate this process.

An Approach to Synchronize UML-Based Design Components for Model-Driven Protocol Development

Abstract: Applying UML diagrams for the design of dependable systems like communication protocols helps to visualize the protocol behavior in multiple representations. In principle, protocols are comprehensible by modeling its behaviors through sequence diagrams. However, the sequence diagrams encapsulate local protocol functions, such as protocol data unit coding/decoding, correctness checks, etc. To model the local actions of the protocol entities activity diagrams may be used as a balancing model. By using two different models, one should ensure that the described behaviors are consistent. To prove this we present an approach in this paper to synchronize the UML sequence and activity diagrams through mapping rules. The rules are predefined according to the UML specification by a stereotype. Later they are used for validating the two diagrams. We show the approach for an example protocol function.

Holzmann의 ˝The Model Checker SPIN˝에 대하여

Abstract: 본 논문에서는 Dr Gerald J. Holzmann이 제시하였던 커널 스케줄링 방식을 프로세스 알제브라 ACSR-VP를 이용해서 있음을 보인다. 본 오류는 SPIN을 통하여 역시 확인하였다. 이것을 다시 모델링하여 오류를 수정하였고 ACSR-VP와 SPIN으로 오류가 수정되었음을 확인하였다.

A formal verification framework for SysML activity diagrams

Abstract: SysML activity diagrams are OMG/INCOSE standard diagrams used for modeling and specifying probabilistic systems. They support systems composition by call behavior and send/receive artifacts. For verification, the existing approaches dedicated to these diagrams are limited to a restricted set of artifacts. In this paper, we propose a formal verification framework for these diagrams that supports the most important artifacts. It is based on mapping a composition of SysML activity diagrams to the input language of the probabilistic symbolic model checker called ''PRISM''. To prove the soundness of our mapping approach, we capture the underlying semantics of both the SysML activity diagrams and their generated PRISM code. We found that the probabilistic equivalence relation between both semantics preserve the satisfaction of the system requirements. Finally, we demonstrate the effectiveness of our approach by presenting real case studies.

Systematic Review of Software Behavioral Model Consistency Checking

Abstract: In software development, models are often used to represent multiple views of the same system. Such models need to be properly related to each other in order to provide a consistent description of the developed system. Models may contain contradictory system specifications, for instance, when they evolve independently. Therefore, it is very crucial to ensure that models conform to each other. In this context, we focus on consistency checking of behavior models. Several techniques and approaches have been proposed in the existing literature to support behavioral model consistency checking. This article presents a Systematic Literature Review (SLR) that was carried out to obtain an overview of the various consistency concepts, problems, and solutions proposed regarding behavior models. In our study, the identification and selection of the primary studies was based on a well-planned search strategy. The search process identified a total of 1770 studies, out of which 96 have been thoroughly analyzed according to our predefined SLR protocol. The SLR aims to highlight the state-of-the-art of software behavior model consistency checking and identify potential gaps for future research. Based on research topics in selected studies, we have identified seven main categories: targeted software models, types of consistency checking, consistency checking techniques, inconsistency handling, type of study and evaluation, automation support, and practical impact. The findings of the systematic review also reveal suggestions for future research, such as improving the quality of study design and conducting evaluations, and application of research outcomes in industrial settings. For this purpose, appropriate strategy for inconsistency handling, better tool support for consistency checking and/or development tool integration should be considered in future studies.

A quantitative verification framework of SysML activity diagrams under time constraints

Abstract: Formal verification framework for probabilistic systems is proposed.SysML activity diagrams is used for system modeling.Automatic transformation of activity diagram into PRISM language.The soundness of the proposed framework is proved. Time-constrained and probabilistic verification approaches gain a great importance in system behavior validation including avionic, transport risk assessment, automotive systems and industrial process controllers. They enable the evaluation of system behavior according to the design requirements and ensure their correctness before any implementation. Due to the difficulty of analyzing, modeling and verifying these large scale systems, we introduce a novel verification framework based on PRISM probabilistic model checker that takes the SysML activity diagram as input and produce their equivalent timed probabilistic automata that is/are expressed in PRISM language. To check the functional correctness of the system under test, the properties are expressed in PCTL temporal logic. To prove the soundness of our mapping approach, we capture the underlying semantics of both the SysML activity diagrams and their generated PRISM code. We found that the timed probabilistic equivalence relation between both semantics preserve the satisfaction of the system requirements. We present digital camera as case study to illustrate the applicability of the proposed approach and to demonstrate its efficiency by analyzing a performability properties.