Pragya Agarwal

Bio: Pragya Agarwal is an academic researcher from Maulana Azad Medical College. The author has contributed to research in topics: Fibonacci number & Efficient energy use. The author has an hindex of 3, co-authored 3 publications receiving 12 citations.

SSTL Based Energy Efficient FIFO Design for High Performance Processor of Portable Devices

Abstract: for High Performance Processor of Portable Devices Abhay Saxena , Sanjeev Kumar Sharma , Pragya Agarwal Chandrashekhar Patel #4 #1,3,4 Department of Computer Science DSVV Haridwar, India 1 abhaysaxena2009@gmail.com 3 pragyaagarwal30@gmail.com shekharrockin1988@gmail.com *2 JP Institute of Engineering and Technology Meerut, India 2 dean.ar@jpiet.com Abstract— Now days green computing is major research area in the computer science field, where we want to reduce the total power consumption of our device by applying different techniques .Having this concern we have designed our FIFO (First In First Out) circuit and calculated its total power dissipation at different-different families of SSTL with frequency scaling techniques. In this technique we used following (20 GHz, 40GHz, 60 GHz and 80 GHz ) frequency range. In our work first we have worked with SSTL12 and found that when we scaled down the frequency from 80 GHz to 20 GHz 71.55% reduction in total IO power. In second we have worked with SSTL15 and got 74.02% of reduction in total IO power when we reduced frequency from 80 GHz to 20 GHz. In last we worked with SSTL18_I and SSTL18_II and found 74.29% and 74.28% of reduction in total power respectively, when we scaled down the frequency from 80 GHz to 20 GHz. We have designed our FIFO on 28 nm kintex-7 FPGA family

Designing Power Efficient Fibonacci Generator Using Different FPGA Families

Abstract: In consideration to wireless communication Fibonacci number is used to generate WPA and WPA2 (Wi-Fi Protected Access) key. Here, in our work we have designed green Fibonacci Generator under different FPGA families. Families we taken into consideration is Automotive Artix7, Artix7 and Kintex7. First we have calculated power consumption of our designed at 2Volt & 1GHz frequency and change the capacitance from 5 to 30pf and found there is tiny changes in Artix7and kintex7 Family but got significant changes in Automotive Artix7 around 16.79%. Secondly we have calculated power consumption of our designed at 2Volt & 10 GHz frequency and change the capacitance from 5 to 30pf, and found 41.09%, 13.95% and 38.06% change respectively for Automotive Artix7, Artix7 and Kintex7 FPGA families. Third we have worked with 3V and 1 GHz and got tiny changes with Artix7 and Kintex7 and found error value with Automotive Artix7. Lastly we have worked with 3V and 10 GHz and changed the capacitance from 5 to 30pf, we got 4.7% and 30.10% significant reduction in power consumption for Artix7 and Kintex7 FPGA families but for Automotive Artix7 we again got error value. Keyword Artix7, kentix7, FPGA, Energy Efficient Design

High Performance FIFO Design for Processor through Voltage Scaling Technique

Abstract: Green computing is making revolution by bringing high speed processor with less power consumption. Our paper is based on this philosophy. Objectives: To come out High Performance FIFO for processor by minimizing the power consumption. Methods/Statistical Analysis: To make FPGA based design of FIFO we used voltages and frequency scaling techniques. Keeping voltage constant at 2.3 volt we varied frequency from 20MHz to 250MHz and for other experiment we kept the frequency constant and varies voltages from 1volt to 2.3 volt. Findings: The power consumption is reduced to 95.79% on voltage scaling where as there is a 4.38% less power consumption on frequency scaling. Application/Improvements: It will surely help in futuristic processor development.

A Comprehensive Review on Varicose Veins: Preventive Measures and Different Treatments.

Abstract: The purpose of this article was to review the different preventive measures and treatments for varicose veins disease. Varicose veins are tortuous, enlarged veins that are usually found in the lower extremities damages blood vessels leading to its painful swelling cause's blood clots, affecting people over increasing prevalence with age and affects the proficiency, productivity, and life quality of a person. Prolonged standing and obesity are the major reason for varicose vein disease. The mechanisms, prevention, risk factors, complications, and treatment of varicose veins are explained in this review. Various types of treatments such as endovascular, surgical, and herbal treatments improve quality of life and reduce the secondary complications of varicose veins. Besides these methods of treatments, varicose vein disease can be prevented by doing regular yoga/exercise and consumption of several fruits and vegetables such as Grapes, blackberries, avocados, ginger, and rosemary. Typically, varicose veins can be a benign process with several problems that can influence the life quality of an individual that can lead to potentially life-threatening complications. However, there are numerous surgical, endovascular, and chemical treatments that improve quality of life and decrease secondary complications of varicose veins. Patients with varicose veins should take an antioxidant medicament from the flavonoid groups to reduce the arterial blood pressure value, risk of atherosclerosis development, prevent thrombotic incidents.Key teaching pointsChronic venous disease is a pathological state of vein circulatory systems of the lower limbsProlonged standing and obesity are the major reason for varicose vein diseaseEndovascular, surgical, and herbal treatments improve quality of life and reduce the secondary complications of varicose veinsVenoactive drugs such as flavonoids, saponins, and others have a therapeutic effect on chronic venous disordersPhlebotropic drugs are semi-synthetic substances widely used in different states of chronic venous insufficiencyFood rich in phytoconstituents are more effective in varicose veins.

Energy Efficient CRC Design for Processor of Workstation, and Server using LVCMOS

Abstract: In our work we have designed CRC using the LVCMOS IO standards which are stands for Low Voltage Complementary Metal Oxide Semiconductor. In this work we have worked with four kinds of LVCMOS (LVCMOS 12, LVCMOS 15, LVCMOS 18, LVCMOS 25). For LVCMOS 12 when we scaled down the frequency form 50GHz to 10 GHz we found 64.41% reduction in total power. For LVCMOS 15 when we change down the frequency form 50GHz to 10GHz we found 67.58% reduction in total power. For LVCMOS 18 when we scaled down the frequency form 50GHz to 10 GHz we found 69.54% reduction in total power. In last when we reduced the frequency form 50GHz to 10GHz in LVCMOS 25 we found 64.41% reduction in total power. Our CRC design is implemented on Virtex-6 FPGA family.

SSTL IO Based WLAN Channel Specific Energy Efficient RAM Design for Internet of Thing

Abstract: Now days in area of computer science Green computing is creating revolution by bringing some new digital component with less power consumption. Our research work is created on this idea. In this paper our objective is to come up with High Performance RAM design for IOT based processor by reducing the power consumption. For calculating total power consumption of FPGA based RAM we used five WLAN frequencies (900 MHz, 2.4GHz, 3.6GHz, 5GHz, 5.6GHz) and calculated Clock, Logic, Signals, IOs, Leakage power at four different IOs standard (SSTL 135, SSTL15, SSTL18_I, SSTL18_II). In experiment we found that if we will use the SSTL135 instead of SSTL18_II IO standard then we can reduced power consumption by 8.69% at 900MHz, 10.74% at 2.4MHz, 11.80% at 3.6MHz, 12.86% at 5MHz and 13.29% at 5.9MHz. We think that the application of this design will definitely help to design in futuristic IOT based processor development.

Designing Power Efficient Fibonacci Generator Using Different FPGA Families

Abstract: In consideration to wireless communication Fibonacci number is used to generate WPA and WPA2 (Wi-Fi Protected Access) key. Here, in our work we have designed green Fibonacci Generator under different FPGA families. Families we taken into consideration is Automotive Artix7, Artix7 and Kintex7. First we have calculated power consumption of our designed at 2Volt & 1GHz frequency and change the capacitance from 5 to 30pf and found there is tiny changes in Artix7and kintex7 Family but got significant changes in Automotive Artix7 around 16.79%. Secondly we have calculated power consumption of our designed at 2Volt & 10 GHz frequency and change the capacitance from 5 to 30pf, and found 41.09%, 13.95% and 38.06% change respectively for Automotive Artix7, Artix7 and Kintex7 FPGA families. Third we have worked with 3V and 1 GHz and got tiny changes with Artix7 and Kintex7 and found error value with Automotive Artix7. Lastly we have worked with 3V and 10 GHz and changed the capacitance from 5 to 30pf, we got 4.7% and 30.10% significant reduction in power consumption for Artix7 and Kintex7 FPGA families but for Automotive Artix7 we again got error value. Keyword Artix7, kentix7, FPGA, Energy Efficient Design