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Author

Qihao Song

Bio: Qihao Song is an academic researcher from Virginia Tech. The author has contributed to research in topics: Overvoltage & Breakdown voltage. The author has an hindex of 3, co-authored 9 publications receiving 25 citations.

Papers
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Journal ArticleDOI
TL;DR: In this paper, the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching were studied. And the results suggest that the BV and over voltage margin of HEMTs in practical power switching can be significantly underestimated using the static BV.
Abstract: This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. These results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV.

53 citations

Proceedings ArticleDOI
Ruizhe Zhang1, Joseph P. Kozak1, Qihao Song1, Ming Xiao1, Jingcun Liu1, Yuhao Zhang1 
12 Dec 2020
TL;DR: In this paper, the transient breakdown voltage (BV) of a non-avalanche device in ultra-short pulses was measured based on the unclamped inductive switching (UIS) setup.
Abstract: This work develops a new method to measure the transient breakdown voltage (BV) of a non-avalanche device in ultra-short pulses, based on the unclamped inductive switching (UIS) setup. For the first time, the transient BVs of two types of 600/650-V enhancement-mode p-gate GaN high-electron-mobility transistors (HEMTs) are measured across the pulse duration from 25 ns (dv/dt > 100 V/ns) to 2 s. The BV is found to increase with the decreased pulse width, up to 500 V higher than the static BV. This behavior is explained by the reduced buffer trapping and the resulted lower peak electric field in shorter pulses. Slightly different BV dependences on pulse width are observed in the two types of devices and the mechanisms are unveiled. Repetitive UIS tests are also conducted, revealing that this newly-found "dynamic BV" can provide GaN HEMTs additional overvoltage and surge energy margin in power applications. These findings provide critical new insights on the BV and ruggedness of GaN HEMTs.

47 citations

Proceedings ArticleDOI
Qihao Song1, Ruizhe Zhang1, Joseph P. Kozak1, Jingcun Liu1, Qiang Li1, Yuhao Zhang1 
14 Jun 2021
TL;DR: In this article, a 650-V rated cascode GaN high-electron-mobility-transistor (HEMT) was used for unclamped inductive switching (UIS) test.
Abstract: Surge energy robustness is essential for power semiconductor devices in many power electronics applications, such as automotive powertrains and electrical grids. Si and SiC MOSFETs can dissipate surge energy via avalanche. However, GaN high-electron-mobility-transistor (HEMT) has no avalanche capability. Recent studies have investigated the surge energy robustness of p-gate GaN HEMTs, revealing a capacitive-charging-based withstanding process. The degradation of p-gate GaN HEMT under repetitive surge energy stresses has also been reported. This work, for the first time, studies the repetitive surge energy robustness of a 650-V rated cascode GaN HEMT in the unclamped inductive switching (UIS) test. The cascode GaN HEMT shows a lower failure boundary under the repetitive UIS stress than the one under the single UIS stress. When the surge energy approaches the repetitive failure boundary, devices do not fail immediately but within limited cycles of stress. Devices were found to survive 1 million UIS cycles when the peak UIS voltage is reduced to ~80% of the failure boundary, but show considerable parametric shifts after the repetitive stress, including an on-resistance (RDS(ON)) increase during both forward and reverse conductions, a reduction in the off-state drain leakage current (I DSS ), and a negative shift of the drain-to-source capacitance (C DS ). These behaviors of device failure and degradation under repetitive UIS stresses can be explained by the buffer trapping accumulation in GaN HEMTs, which may lead to a reduction of the device dynamic breakdown voltage. This physical explanation has also been validated by physics-based TCAD simulation.

19 citations

Proceedings ArticleDOI
Qihao Song1, Ruizhe Zhang1, Joseph P. Kozak1, Jingcun Liu1, Qiang Li1, Yuhao Zhang1 
21 Mar 2021
TL;DR: In this paper, the surge-energy robustness of a 650-V rated cascode GaN HEMT in the unclamped inductive clamping (UIS) test was investigated.
Abstract: Surge energy robustness of power devices is highly desired in many power applications such as automotive powertrains and power grids. While Si and SiC power MOSFETs withstand surge energy through avalanching, GaN high-electron-mobility transistors (HEMTs) have no avalanche capability. Recent studies have revealed that the p-gate GaN HEMT withstands surge energy through capacitive charging and fails when the peak capacitive voltage reaches its breakdown voltage (BV). This work, for the first time, studies the surge-energy robustness of a 650-V rated cascode GaN HEMT in the unclamped inductive clamping (UIS) test. The cascode GaN HEMT was found to withstand the surge energy via capacitive charging but accompanied by the Si MOSFET avalanching. Two failure modes were observed, both occurring in the GaN HEMT. The first mode is featured by a short between the HEMT gate and drain (cascode source and drain), while the second mode is featured by a short between the HEMT source and drain. Statistical results of multiple devices tested under different load inductance show that the second failure mode predominates. Additionally, the device failure voltage in mode I is statistically higher than that in mode II. Failure analysis of both modes is presented, and the physical explanations of the two modes and their competitions are proposed. These results provide important new insights into the robustness of cascode GaN HEMTs.

16 citations

Proceedings ArticleDOI
Joseph P. Kozak1, Ruizhe Zhang1, Jingcun Liu1, Qihao Song1, Ming Xiao1, Yuhao Zhang1 
11 Oct 2020
TL;DR: In this paper, the authors characterized the transient overvoltage capability and failure mechanisms of two commercial enhancement-mode (E-mode) p-gate HEMTs under hard-switched turnoff conditions at increasing temperatures, by using a clamped inductive switching circuit with a variable parasitic inductance.
Abstract: An essential ruggedness characteristic of power devices is the capability to withstand the transient overvoltage in power electronic applications. As the newly commercialized GaN HEMTs can switch faster, and under higher voltage biases, it is important to identify their true overvoltage limitations in transient switching events. For the first time, this work characterizes the transient overvoltage capability and failure mechanisms of GaN HEMTs under hard-switched turn-off conditions at increasing temperatures, by using a clamped inductive switching circuit with a variable parasitic inductance. This test method allows a flexible control over both the magnitude and the dV/dt of the transient overvoltage. The overvoltage robustness of two commercial enhancement-mode (E-mode) p-gate HEMTs was extensively studied: one with the Ohmic-type gate and the other with the Schottky-type gate. The overvoltage failure of the two devices was found to be determined by the overvoltage magnitude rather than the dV/dt. Tests were repeated at increasing temperatures (100 °C and 150 °C), and the failures of both devices were consistent with room temperature results. The two types of devices show different failure behaviors and the underlying mechanisms have been revealed by physics-based device simulations.

14 citations


Cited by
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Journal ArticleDOI
TL;DR: In this article, the authors provide a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability, which is a key missing piece to realize the full GaN platform with integrated digital, power, and RF electronics technologies.
Abstract: GaN technology is not only gaining traction in power and RF electronics but is also rapidly expanding into other application areas including digital and quantum computing electronics. This paper provides a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability. While GaN power devices have recently been commercialized in the 15–900 V classes, new GaN devices are greatly desirable to explore both higher-voltage and ultra-low-voltage power applications. Moving into the RF domain, ultra-high frequency GaN devices are being used to implement digitized power amplifier circuits, and further advances using the hardware–software co-design approach can be expected. On the horizon is the GaN CMOS technology, a key missing piece to realize the full-GaN platform with integrated digital, power, and RF electronics technologies. Although currently a challenge, high-performance p-type GaN technology will be crucial to realize high-performance GaN CMOS circuits. Due to its excellent transport characteristics and ability to generate free carriers via polarization doping, GaN is expected to be an important technology for ultra-low temperature and quantum computing electronics. Finally, given the increasing cost of hardware prototyping of new devices and circuits, the use of high-fidelity device models and data-driven modeling approaches for technology-circuit co-design are projected to be the trends of the future. In this regard, physically inspired, mathematically robust, less computationally taxing, and predictive modeling approaches are indispensable. With all these and future efforts, we envision GaN to become the next Si for electronics.

83 citations

Journal ArticleDOI
TL;DR: In this article, the authors present a global overview of the reported GaN FinFET and trigate device technologies for RF and power applications, as well as provide in-depth analyses correlating device design parameters to device performance space.
Abstract: Gallium nitride (GaN) is becoming a mainstream semiconductor for power and radio-frequency (RF) applications. While commercial GaN devices are increasingly being adopted in data centers, electric vehicles, consumer electronics, telecom and defense applications, their performance is still far from the intrinsic GaN limit. In the last few years, the fin field-effect transistor (FinFET) and trigate architectures have been leveraged to develop a new generation of GaN power and RF devices, which have continuously advanced the state-of-the-art in the area of microwave and power electronics. Very different from Si digital FinFET devices, GaN FinFETs have allowed for numerous structural innovations based on engineering the two-dimensional-electron gas or p–n junctions, in both lateral and vertical architectures. The superior gate controllability in these fin-based GaN devices has not only allowed higher current on/off ratio, steeper threshold swing, and suppression of short-channel effects, but also enhancement-mode operation, on-resistance reduction, current collapse alleviation, linearity improvement, higher operating frequency, and enhanced thermal management. Several GaN FinFET and trigate device technologies are close to commercialization. This review paper presents a global overview of the reported GaN FinFET and trigate device technologies for RF and power applications, as well as provides in-depth analyses correlating device design parameters to device performance space. The paper concludes with a summary of current challenges and exciting research opportunities in this very dynamic research field.

54 citations

Journal ArticleDOI
TL;DR: In this paper, the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching were studied. And the results suggest that the BV and over voltage margin of HEMTs in practical power switching can be significantly underestimated using the static BV.
Abstract: This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. These results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV.

53 citations

Journal ArticleDOI
TL;DR: In this paper, the authors implemented beveled-mesa NiO/Ga2O3 p-n heterojunction diodes (HJDs) into a 500-W power factor correction (PFC) system circuit, achieving high conversion efficiency of 98.5% with 100-min stable operating capability.
Abstract: The technical progress of Ga2O3 power diodes is now stuck at a critical point where a lack of performance evaluation and reliability validation at the system-level applications seriously limits their further development and even future commercialization. In this letter, by implementing beveled-mesa NiO/Ga2O3 p–n heterojunction diodes (HJDs) into a 500-W power factor correction (PFC) system circuit, high conversion efficiency of 98.5% with 100-min stable operating capability has been demonstrated. In particular, rugged reliability is validated after over 1 million times dynamic breakdown with a 1.2-kV peak overvoltage. Meanwhile, superior device performance is achieved, including a static breakdown voltage (BV) of 1.95 kV, a dynamic BV of 2.23 kV, a forward current of 20 A (2 kA/cm2 current density), and a differential specific on -resistance of 1.9 mΩ·cm2. These results indicate that Ga2O3 power HJDs are developing rapidly with their own advantages, presenting the enormous potential in high-efficiency, high-power, and high-reliability applications.

49 citations

Journal ArticleDOI
TL;DR: In this paper , the performance evaluation and reliability validation at the system-level applications seriously limits their further development and even future commercialization, and a beveled-mesa NiO/Ga was implemented in a 500-W power factor correction (PFC) system circuit.
Abstract: The technical progress of Ga 2 O 3 power diodes is now stuck at a critical point where a lack of performance evaluation and reliability validation at the system-level applications seriously limits their further development and even future commercialization. In this letter, by implementing beveled-mesa NiO/Ga 2 O 3 p–n heterojunction diodes (HJDs) into a 500-W power factor correction (PFC) system circuit, high conversion efficiency of 98.5% with 100-min stable operating capability has been demonstrated. In particular, rugged reliability is validated after over 1 million times dynamic breakdown with a 1.2-kV peak overvoltage. Meanwhile, superior device performance is achieved, including a static breakdown voltage (BV) of 1.95 kV, a dynamic BV of 2.23 kV, a forward current of 20 A (2 kA/cm 2 current density), and a differential specific on -resistance of 1.9 mΩ·cm 2 . These results indicate that Ga 2 O 3 power HJDs are developing rapidly with their own advantages, presenting the enormous potential in high-efficiency, high-power, and high-reliability applications.

39 citations