The outstanding properties of SiO2, which include high resistivity, excellent dielectric strength, a large band gap, a high melting point, and a native, low defect density interface with Si, are in large part responsible for enabling the microelectronics revolution. The Si/SiO2 interface, which forms the heart of the modern metal–oxide–semiconductor field effect transistor, the building block of the integrated circuit, is arguably the worlds most economically and technologically important materials interface. This article summarizes recent progress and current scientific understanding of ultrathin (<4 nm) SiO2 and Si–O–N (silicon oxynitride) gate dielectrics on Si based devices. We will emphasize an understanding of the limits of these gate dielectrics, i.e., how their continuously shrinking thickness, dictated by integrated circuit device scaling, results in physical and electrical property changes that impose limits on their usefulness. We observe, in conclusion, that although Si microelectronic devices...

Ultrathin (<4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits

A new silicon solar cell structure, the passivated emitter and rear cell, is described. The cell structure has yielded independently confirmed efficiencies of up to 22.8%, the highest ever reported for a silicon cell.

22.8% efficient silicon solar cell

The reduction in electronic recombination losses by the passivation of silicon surfaces is a critical enabler for high-efficiency solar cells. In 2006, aluminum oxide (Al2O3) nanolayers synthesized by atomic layer deposition (ALD) emerged as a novel solution for the passivation of p- and n-type crystalline Si (c-Si) surfaces. Today, high efficiencies have been realized by the implementation of ultrathin Al2O3 films in laboratory-type and industrial solar cells. This article reviews and summarizes recent work concerning Al2O3 thin films in the context of Si photovoltaics. Topics range from fundamental aspects related to material, interface, and passivation properties to synthesis methods and the implementation of the films in solar cells. Al2O3 uniquely features a combination of field-effect passivation by negative fixed charges, a low interface defect density, an adequate stability during processing, and the ability to use ultrathin films down to a few nanometers in thickness. Although various methods can be used to synthesize Al2O3, this review focuses on ALD—a new technology in the field of c-Si photovoltaics. The authors discuss how the unique features of ALD can be exploited for interface engineering and tailoring the properties of nanolayer surface passivation schemes while also addressing its compatibility with high-throughput manufacturing. The recent progress achieved in the field of surface passivation allows for higher efficiencies of industrial solar cells, which is critical for realizing lower-cost solar electricity in the near future.

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Status and prospects of Al2O3-based surface passivation schemes for silicon solar cells

Degradation of silicon dioxide films is shown to occur primarily near interfaces with contacting metals or semiconductors. This deterioration is shown to be accountable through two mechanisms triggered by electron heating in the oxide conduction band. These mechanisms are trap creation and band‐gap ionization by carriers with energies exceeding 2 and 9 eV with respect to the bottom of the oxide conduction band, respectively. The relationship of band‐gap ionization to defect production and subsequent degradation is emphasized. The dependence of the generated sites on electric field, oxide thickness, temperature, voltage polarity, and processing for each mechanism is discussed. A procedure for separating and studying these two generation modes is also discussed. A unified model from simple kinetic relationships is developed and compared to the experimental results. Destructive breakdown of the oxide is shown to be correlated with ‘‘effective’’ interface softening due to the total defect generation caused by both mechanisms.

Impact ionization, trap creation, degradation, and breakdown in silicon dioxide films on silicon

Leakage currents introduced in the low‐field, direct‐tunneling regime of thin oxides during high‐field stress are related to defects produced by hot‐electron transport in the oxide layer. From these studies, it is concluded that the ‘‘generation’’ of neutral electron traps in thin oxides is the dominant cause of this phenomenon. Other mechanisms due to anode hole injection or oxide nonuniformities are shown to be unrealistic for producing these currents. Exposure of thin oxides to atomic hydrogen from a remote plasma is shown to cause leakage currents similar to those observed after high‐field stress, supporting the conclusion that these currents are related to hydrogen‐induced defects.

Mechanism for stress-induced leakage currents in thin silicon dioxide films

A new and accurate approach to charge-pumping measurements for the determination of the Si-SiO 2 interface state density directly on MOS transistors is presented. By a careful analysis of the different processes of emission of electrons towards the conduction band and of holes towards the valence band, depending on the charge state of the interface, all the previously ill-understood phenomena can be explained and the deviations from the simple charge-pumping theory can be accounted for. The presence of a geometric component in some transistor configurations is illustrated and the influence of trapping time constants is discussed. Furthermore, based on this insight, a new technique is developed for the determination of the energy distribution of interface states in small-area transistors, without requiring the knowledge of the surface potential dependence on gate voltage.

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A reliable approach to charge-pumping measurements in MOS transistors

A novel method is presented to determine Si-SiO/sub 2/ interface recombination parameters. The device used is a polysilicon-oxide-semiconductor capacitor with a microscale central junction (a gate-controlled point-junction diode). Data analysis has been performed using a numerical scheme to find a quasi-exact solution for the current combining at the interface. It was found that the interface recombination parameters depend only weakly on trap energy in a wide range around midgap. The cross-section for capturing electrons was found to exceed the cross-section for capturing holes by a factor of 10/sup 2/ to 10/sup 3/. >

Determination of Si-SiO/sub 2/ interface recombination parameters using a gate-controlled point-junction diode under illumination

The feasibility of a self‐aligned silicide technology based upon cobalt has been investigated. Silicidation reactions were performed by means of rapid thermal processing. Phase sequence, layer morphology, and reaction kinetics were studied by XRD, SEM, RBS, AES, and TEM. Extremely smooth, highly conductive (16 μΩ cm) CoSi2 films were formed by direct reaction of Co on Si, without significant lateral silicide formation at oxide edges. Shallow arsenic junctions were successfully silicided and low contact resistances were obtained on n+ and p+ Si.

A self‐aligned cobalt silicide technology using rapid thermal processing

Cobalt silicide is investigated in view of possible application in a self-aligned technology. Extremely smooth, highly conductive CoSi 2 films are obtained using rapid thermal processing for silicide formation starting from deposited cobalt layers (on Si). The phase formation is studied by XRD and RBS. No lateral silicide formation is observed at contact edges. The influence of Si consumption and dopant behavior on diode performance is studied. Shallow arsenic (0.15 µm deep) and boron (0.3 µm deep) junctions are successfully silicided. Very low contact resistances are obtained between the silicide and n+ and p+ regions. MOS transistors were fabricated with CoSi 2 on the source, drain, and gate. An increase in current driving capability is noticed while no degradation of other electrical parameters due to the silicide processing steps is observed. At some critical points, comparison is made with the TiSi 2 process.

A self-aligned CoSi 2 interconnection and contact technology for VLSI applications

A modified floating-gate technique for measuring small gate currents in MOSFET's with very high resolution (0.01 fA) is described. Using this technique, gate oxide currents due to hot-carrier injection are measured in n-channel MOSFET's. The conventional negative channel hot-electron gate oxide current is observed near V_{g} = V_{d} and a small positive gate current occurs at low V g . We argue that the dependencies of this small positive current on V g and gate length, together with results from a separate floating-source experiment, are consistent only with hot-hole injection.

R.F. De Keersmaecker

Papers

A reliable approach to charge-pumping measurements in MOS transistors

Determination of Si-SiO/sub 2/ interface recombination parameters using a gate-controlled point-junction diode under illumination

A self‐aligned cobalt silicide technology using rapid thermal processing

A self-aligned CoSi 2 interconnection and contact technology for VLSI applications

Observation of hot-hole injection in NMOS transistors using a modified floating-gate technique