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Author

R. Gillon

Bio: R. Gillon is an academic researcher from Université catholique de Louvain. The author has contributed to research in topics: Silicon on insulator & Equivalent circuit. The author has an hindex of 8, co-authored 15 publications receiving 483 citations.

Papers
More filters
Journal ArticleDOI
TL;DR: An original scheme is presented, which allows reliable identification of the parameters of the non-quasi-static (NQS) small-signal model for MOSFETs by combining careful design of probing and calibration structures, rigorous in situ calibration, and a new powerful direct extraction method.
Abstract: The maturation of low-cost silicon-on-insulator (SOI) MOSFET technology in the microwave domain has brought about a need to develop specific characterization techniques. An original scheme is presented, which, by combining careful design of probing and calibration structures, rigorous in situ calibration, and a new powerful direct extraction method, allows reliable identification of the parameters of the non-quasi-static (NQS) small-signal model for MOSFETs. The extracted model is shown to be valid up to 40 GHz.

138 citations

Journal ArticleDOI
TL;DR: In this article, N-type field effect transistors have been fabricated in a complementary metal oxide-semiconductor compatible thin-film silicon-on-insulator technology with titanium, cobalt, and nickel self-aligned silicide processes for lowvoltage, low-power microwave applications.
Abstract: TiSi2, CoSi2, and NiSi self-aligned silicide processes have been studied, compared, and applied to thin-film silicon-on-insulator technology. Compared to TiSi2, CoSi2 and NiSi have the advantages of wider process temperature window, no significant doping retarded reaction, narrow runner degradation, and thin-film degradation. Therefore, they are more suitable for thin-film silicon-on-insulator technology. N-type field effect transistors have been fabricated in a complementary metal oxide-semiconductor compatible thin-film silicon-on-insulator technology with titanium, cobalt, and nickel self-aligned silicide processes for low-voltage, low-power microwave applications. The initial thicknesses of titanium, cobalt, and nickel are 30, 13, and 25 nm, respectively. The gate sheet resistances are 6.2, 4.4, and 2.9 Omega/square, respectively, and the total source/drain series resistances are 700, 290, and 550 Omega mu m, respectively. High-frequency measurement results are also presented.

104 citations

Journal ArticleDOI
TL;DR: In this article, the authors demonstrate that FD SOI MOSFETs exhibit near-ideal body factor, sub-threshold slope and current drive properties for mixed fabrication and operation under low supply voltage of analog, digital and microwave components.
Abstract: This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal body factor, subthreshold slope and current drive. These assets are both theoretically and experimentally investigated. Original circuit studies then show how a basic FD SOI CMOS process allows for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Experimental circuit realizations support the analysis.

83 citations

Proceedings ArticleDOI
30 Sep 1996
TL;DR: In this paper, the high-frequency performances of microwave transistors fabricated using a standard fully-depleted SOI CMOS process are described, which are compatible with analog and digital circuits fabricated using the same low-cost process.
Abstract: Summary form only given. Recently, it has been demonstrated that the use of high-resistivity SOI (SIMOX) substrates (5,000 and 10,000 /spl Omega/.cm) yields MOSFETs which offer interesting microwave performances. Indeed unity-gain frequencies (f/sub T/) of 14 and 23.6 GHz and maximum oscillation frequencies (f/sub max/) of 21 and 32 GHz have been reported for effective gate lengths of 0.36 and 0.25 /spl mu/m, respectively, and using supply voltages ranging from 3 to 5 volts. Such devices can be integrated with planar lines to implement MMIC circuits. These transistors were fabricated using a dedicated MOS process, called MICROX/sup TM/, which uses non-standard CMOS features, such as a metal (gold) gate and air-bridge metallisation. In this work, the high-frequency performances of microwave transistors fabricated using a standard fully-depleted SOI CMOS process are described. These devices are, therefore, compatible with analog and digital circuits fabricated using the same low-cost process.

63 citations

Journal ArticleDOI
TL;DR: In this paper, a linear regression technique is used to solve the extraction problem of series equivalent circuit elements values from S-parameters measurements at a single bias point in saturation, and the resulting algorithm is very simple and efficient when compared to optimizer-driven approaches.
Abstract: A new extraction scheme is proposed which allows to determine all the series equivalent circuit elements values from S-parameters measurements at a single bias point in saturation. Exploiting the specific shape of a set of impedance loci, the new scheme uses linear regression techniques to solve the extraction problem. The resulting algorithm is very simple and efficient when compared to optimizer-driven approaches.

56 citations


Cited by
More filters
Journal ArticleDOI
01 Feb 2000
TL;DR: In this article, an updated version of a 1985 tutorial paper on active filters using operational transconductance amplifiers (OTAs) is presented, and the integrated circuit issues involved in active filters (using CMOS transconductances amplifiers) and the progress in this field in the last 15 years is addressed.
Abstract: An updated version of a 1985 tutorial paper on active filters using operational transconductance amplifiers (OTAs) is presented. The integrated circuit issues involved in active filters (using CMOS transconductance amplifiers) and the progress in this field in the last 15 years is addressed. CMOS transconductance amplifiers, nonlinearised and linearised, as well as frequency limitations and dynamic range considerations are reviewed. OTA-C filter architectures, current-mode filters, and other potential applications of transconductance amplifiers are discussed.

343 citations

Journal ArticleDOI
TL;DR: In this paper, the authors analyzed both by simulations and measurements the substrate crosstalk performances of various Silicon-On-Insulator (SOI) technologies, and compared them to those of normal bulk CMOS process.
Abstract: This work analyzes both by simulations and measurements the substrate crosstalk performances of various Silicon-On-Insulator (SOI) technologies, and compares them to those of normal bulk CMOS process. The influence of various parameters, such as substrate resistivity, buried oxide thickness and distance between devices, is investigated. The use of capacitive guard rings is proposed, and their effectiveness is demonstrated. A simple RC model has been developed to allow a deep understanding of these phenomena as well as to simplify future studies of more complex systems. The superiority of high-resistivity SIMOX substrates over standard SOI and bulk is finally demonstrated.

310 citations

Patent
10 Oct 2002
TL;DR: In this paper, a fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements, which includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.
Abstract: An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

240 citations

Journal ArticleDOI
TL;DR: In this paper, the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m.
Abstract: This work presents a systematic comparative study of the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m. We introduce the transconductance-over-drain current ratio and Early voltage as key figures of merits for the analog MOS performance and the gain and the transition and maximum frequencies for RF performances and link them to device engineering. Specifically, we investigate the effects of HALO implantation in FD, PD, and bulk devices, of film thickness in FD, of substrate doping in SOI, and of nonstandard channel engineering (i.e., asymmetric Graded-channel MOSFETs and gate-body contacted DTMOS).

210 citations

01 Jan 2000
TL;DR: The proposed de-embedding method addresses issues of substrate coupling and contact effects and is therefore suitable for measurements with lossy technologies such as CMOS and allows large devices to be measured with high accuracy.
Abstract: In this paper, a de-embedding method is proposed for conducting accurate on-wafer device measurements in the gi- gahertz range. The method addresses issues of substrate coupling and contact effects and is therefore suitable for measurements with lossy technologies such as CMOS. The method assumes a probe-tip two-port calibration performed with well-known techniques and impedance substrates. By employing a physical interpretation of the test-fixture, the method alleviates a number of known prob- lems with common de-embedding procedures. Four distinct math- ematical steps are suggested to de-embed parasitics for the test-fix- ture to give an accurate measurement of the device under test. By introducing a simple compensation factor for in-fixture stan- dard imperfections, the proposed method allows large devices to be measured with high accuracy. The applicability of the method is demonstrated with measurements up to 12 GHz.

176 citations