R
Rahul Shrestha
Researcher at Indian Institute of Technology Mandi
Publications - 58
Citations - 460
Rahul Shrestha is an academic researcher from Indian Institute of Technology Mandi. The author has contributed to research in topics: Clock rate & Cognitive radio. The author has an hindex of 9, co-authored 46 publications receiving 290 citations. Previous affiliations of Rahul Shrestha include Indian Institutes of Technology & Indian Institute of Technology Guwahati.
Papers
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Proceedings ArticleDOI
Parameterized Posit Arithmetic Hardware Generator
Rohit B. Chaurasiya,John L. Gustafson,Rahul Shrestha,J. Neudorfer,Sangeeth Nambiar,Kaustav Niyogi,Farhad Merchant,Rainer Leupers +7 more
TL;DR: The architecture of a parameterized PAU generator that can generate PAU adders and PAU multipliers of any bit-width pre-synthesis is presented and it is argued that an n-bit IEEE 754-2008 adder and multiplier can be safely replaced with an m-bit PAU addition and multiplier where m
Journal ArticleDOI
High-Throughput Turbo Decoder With Parallel Architecture for LTE Wireless Communication Standards
Rahul Shrestha,Roy Paily +1 more
TL;DR: The logarithmic-Bahl-Cocke-Jelinek-Raviv (LBCJR) algorithm used in MAP decoders is presented, and an ungrouped backward recursion technique for the computation of backward state metrics is presented.
Journal ArticleDOI
High-Throughput LDPC-Decoder Architecture Using Efficient Comparison Techniques & Dynamic Multi-Frame Processing Schedule
TL;DR: This work proposes dynamic multi-frame processing schedule which efficiently utilizes the layered-LDPC decoding with minimum pipeline stages and efficient comparison techniques for both column and row layered schedule and rejection-based high-speed circuits to compute the two minimum values from multiple inputs required for row layered processing of hardware-friendly min-sum decoding algorithm.
Journal ArticleDOI
Hardware-Efficient and Fast Sensing-Time Maximum-Minimum-Eigenvalue-Based Spectrum Sensor for Cognitive Radio Network
TL;DR: An iterative power method has been applied for the first time to compute maximum and minimum eigenvalues that reduces the computational complexity of this MME algorithm and suggests new digital architecture of MME-based spectrum sensor with shorter critical-path delay that lowers its sensing time.
Journal ArticleDOI
Reconfigurable and Memory-Efficient Cyclostationary Spectrum Sensor for Cognitive-Radio Wireless Networks
Mahesh S. Murty,Rahul Shrestha +1 more
TL;DR: A new selective-sampling technique that enables spectrum sensing of orthogonal-frequency division multiplexing primary users with 64, 128, 256, 512, and 1024 subcarriers for contemporary cognitive-radio wireless networks is proposed.