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Author

Raja K B

Bio: Raja K B is an academic researcher from University Visvesvaraya College of Engineering. The author has contributed to research in topics: Facial recognition system & Standard test image. The author has an hindex of 3, co-authored 16 publications receiving 24 citations.

Papers
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Journal Article
TL;DR: The n-bit reversible binary comparator is designed using circuit for MSB as first stage to compare MSBs and one-bit comparator cell as second stage and so on to compare lesser significant bit positions and it is observed that the quantum cost and garbage output values are less in the proposed technique compared to the existing approaches.
Abstract: Reversible logic has attracted significance attention in recent years, leading to different approaches such as synthesis, optimization, simulation and verification. In this paper, we propose the design and optimization of n-bit reversible binary comparator. The circuit for MSB and one-bit comparator cell using NOT, PG and CNOT gates are designed. The n-bit reversible binary comparator is designed using circuit for MSB as first stage to compare MSBs and one-bit comparator cell as second stage and so on to compare lesser significant bit positions. The power consumption, delay, garbage outputs and constant inputs are computed. It is observed that the quantum cost and garbage output values are less in the proposed technique compared to the existing approaches.

4 citations

Proceedings ArticleDOI
10 Sep 2015
TL;DR: This paper proposes FPGA Implementation of Fingerprint Recognition System using Adaptive Threshold Technique with novel adaptive threshold for each person and it is observed that the success rate of identifying a person is high in the proposed method compared to existing techniques.
Abstract: The real time fingerprint biometric system is implemented using FGPA. In this paper, we propose FPGA Implementation of Fingerprint Recognition System using Adaptive Threshold Technique with novel adaptive threshold for each person. The fingerprint images are considered from FVC2004 (DB3_A) and processed to resize fingerprint size to 256X256. The DWT is applied on fingerprint and considered only LL coefficients as features of fingerprint. The Adaptive Threshold value for each person is computed using Deviations between two successive samples of a person, Average Deviation, Standard Deviation and constant. The Adaptive Threshold for test image is computed using Deviations between test images and samples of database, Average Deviation, Standard Deviation and constant. If the Average Threshold of test image is less than Average Threshold of a person then it is considered as match else mismatched. It is observed that the success rate of identifying a person is high in the proposed method compared to existing techniques and also the device utilization in the proposed architecture is less compared to existing architectures.

3 citations

Journal ArticleDOI
TL;DR: The novel concept of converting many images of single person into one image using averaging technique is introduced to reduce execution time and memory and the proposed algorithm is better in terms of performance compared to existing algorithms.
Abstract: The biometric is used to identify a person effectively and employ in almost all applications of day to day activities. In this paper, we propose compression based face recognition using Discrete Wavelet Transform (DWT) and Support Vector Machine (SVM). The novel concept of converting many images of single person into one image using averaging technique is introduced to reduce execution time and memory. The DWT is applied on averaged face image to obtain approximation (LL) and detailed bands. The LL band coefficients are given as input to SVM to obtain Support vectors (SV’s). The LL coefficients of DWT and SV’s are fused based on arithmetic addition to extract final features. The Euclidean Distance (ED) is used to compare test image features with database image features to compute performance parameters. It is observed that, the proposed algorithm is better in terms of performance compared to existing algorithms .

3 citations

Proceedings ArticleDOI
21 Dec 2015
TL;DR: The proposed Optimized Face Recognition Algorithm using Spatial and Transform Domain Techniques is observed to be better compared to existing algorithms.
Abstract: The biometrics is used to identify or verify persons effectively in the real time scenario. In this paper, we propose Optimized Face Recognition Algorithm using Spatial and Transform Domain Techniques. The face images are preprocessed using Discrete Wavelet Transform (DWT), resize and filtering. The Compound Local Binary Pattern (CLBF) is used to generate magnitude and sign components from preprocessed face images. The histogram is applied on sign and magnitude components of CLBF to compress number of features. The generated histogram features are concatenated to form CLBP-Histogram features. The Fast Fourier Transformation (FFT) is applied on preprocessed image and FFT magnitude features are generated. The CLBP-Histogram features are fused with FFT magnitude features to generate final feature set. The final feature sets of test image and data base images are compared using Euclidian Distance (ED) to recognise a person. It is observed that the performance parameter of the proposed algorithm is better compared to existing algorithms.

3 citations

Journal ArticleDOI
TL;DR: Numerical results provide insights that the proposed Real-Time Link Reliability Routing protocol has a lower packet deadline miss ratio and improved sensor network lifetime.
Abstract: This paper proposes a Real-Time Link Reliability Routing protocol for wireless sensor networks (WSNs). The protocol achieves to reduce packet deadline miss ratio while considering link reliability, two-hop velocity and power efficiency and utilizes memory and computational effective methods for estimating the link metrics. Numerical results provide insights that the protocol has a lower packet deadline miss ratio and improved sensor network lifetime. The results show that the proposed protocol is a feasible solution to the QoS routing problem in wireless sensor networks that support real-time applications.

3 citations


Cited by
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Journal ArticleDOI
TL;DR: This paper conducts a survey of techniques which are available for face detection and indicates that hybrid approach with discrete wavelet transformation produces better results.
Abstract: Face Recognition is used in order to ensure authentication in terms of feature verification. Techniques are defined to identify faces under different situations. This paper conducts a survey of techniques which are available for face detection. Recognition is possible in case features are extracted from the presented face images. For this purpose feature extraction mechanisms like discrete wavelet transformation (DWT), SIFT, linear discriminate analysis (LDA), principal component analysis (PCA) are commonly used. Analysis process indicates that hybrid approach with discrete wavelet transformation produces better results. Comparative study of literature is also presented through this work.

29 citations

Journal ArticleDOI
TL;DR: Various clustering approaches have been summarized and few prominent Quality of service (QoS) based clustering routing protocols for WSN have been identified and comparison of these approaches and protocols is discussed based on some parameters.
Abstract: Increased demand of Wireless Sensor Networks (WSN) in various applications has made it a hot research area. Several challenges imposed which include energy conservation, scalability, limited network resources etc. with energy conservation being the most important. Clustering improves the energy efficiency by making high power nodes as cluster heads (CHs) which reduces the chance of energy depletion of nodes. Scalability, fault tolerance, data aggregation, energy efficiency are some of the main objectives of clustering. This paper discusses various challenges associated with clustering and different methods or techniques developed to overcome these challenges. Various clustering approaches have been summarized and few prominent Quality of service (QoS) based clustering routing protocols for WSN have been identified. Comparison of these approaches and protocols is discussed based on some parameters.

18 citations

Proceedings ArticleDOI
01 Dec 2014
TL;DR: An area and power efficient 56T 4-bit comparator design has been presented by using GDI technique and shows improvement of 6.3% in terms of area and 69.42% in power as compared to the PTL 4- bit comparator.
Abstract: In this paper an area and power efficient 56T 4-bit comparator design has been presented by using GDI technique. The proposed 4-bit comparator design consist of 28 NMOS and 28 PMOS. A GDI full adder module has been used to design this comparator which consumes less area and power at 120 nm as compared to previous full adder designs. The proposed 4- bit comparator design is based on this area and power efficient 10T full adder module. To get area and power efficiency a centralized full adder module has been used which avoid cascade implementation of XOR module to get sum and carry output. Full adder modules outputs have been used for the generation of output of 4-bit comparator designs. The proposed 4-bit GDI comparator has been designed and simulated using DSCH 3.1 and Microwind 3.1 on 120nm. For proposed design Power and current variation with respect to the supply voltage has been performed on BSIM-4 using 120nm technology. Results show that Area of proposed 4- bit comparator design is 1320.3μm2 on 120nm technology. At 1.2V input supply voltage the proposed 4bit GDI comparator consumes 13.739μW power at BSIM-4. At 1.2V proposed GDI 4-bit comparator has shown improvement of 6.3% in terms of area and 69.42% in power as compared to the PTL 4- bit comparator.

17 citations

Journal ArticleDOI
TL;DR: An area efficient 17T 1-bit hybrid comparator design has been presented by hybridizing PTL and GDI techniques which consume less area at 120 nm as compared with the previous full adder designs.
Abstract: In this paper an area efficient 17T 1-bit hybrid comparator design has been presented by hybridizing PTL and GDI techniques. The proposed 1-bit comparator design consist of 9 NMOS and 8 PMOS. A PTL and GDI full adder module has been used which consume less area at 120 nm as compared with the previous full adder designs. The proposed Hybrid 1bit comparator design is based on this area efficient 9T full adder module. To improve area and power efficiency a cascade implementation of XOR module has been avoided in the used full adder module. Full adder modules outputs have been used for the generation of three different output of 1-bit comparator designs. The proposed 1-bit comparator has been designed and simulated using DSCH 3.1 and Microwind 3.1 on 120nm. Also the simulation of layout and parametric analysis has been done for the proposed 1-bit comparator design. Power and current variation with respect to the supply voltage has been performed on BSIM-4 and LEVEL-3 on 120nm. Results show that area consumed by the proposed hybrid adder is 329.3μm on 120nm technology. At 1.4V input supply voltage the proposed 1-bit hybrid comparator consume 0.367mW power at BSIM-4 and 0.411mW power at LEVEL-3 and 2.313mA current at BSIM-4 and 3.047mA current at LEVEL-3 model

14 citations

Journal ArticleDOI
TL;DR: In this paper, the fusion of bit-plane and binary image compression techniques is presented for personal identification based on face recognition is receiving extensive attention over the last few years in both research and real-time applications due to increasing emphasis on security.
Abstract: Personal identification based on face recognition is receiving extensive attention over the last few years in both research and real-time applications due to increasing emphasis on security. In this paper, Face Recognition using the Fusion of bit-plane and binary image compression techniques is presented. Face images are resized to 256 ×256 to obtain the uniformity in the size of face images. The Bit-Plane compression algorithm is applied on the resized image to extract the features of face. Similarly, the Binary image compression technique is applied on 256× 256 resized images to extract the features. The features produced from both the compression techniques are added to obtain the final facial features. Finally, the test features and database features are compared using Euclidean Distance classifier. Extensive experiments are conducted on combined, Indian female, Indian male and JAFFE face database. The true success rate of the proposed model provides better recognition rate than other existing state-of-the-art methods.

6 citations