Background: Extrapyramidal motor symptoms precede dementia in Parkinson disease (PDD) by many years, whereas dementia occurs early in dementia with Lewy bodies (DLB). Despite this clinical distinction, the neuropsychological and neuropathologic features of these conditions overlap. In addition to widespread distribution of Lewy bodies, both diseases have variable burdens of neuritic plaques and neurofibrillary tangles characteristic of Alzheimer disease (AD). Objectives: To determine whether amyloid deposition, as assessed by PET imaging with the β-amyloid–binding compound Pittsburgh Compound B (PiB), can distinguish DLB from PDD, and to assess whether regional patterns of amyloid deposition correlate with specific motor or cognitive features. Methods: Eight DLB, 7 PDD, 11 Parkinson disease (PD), 15 AD, and 37 normal control (NC) subjects underwent PiB-PET imaging and neuropsychological assessment. Amyloid burden was quantified using the PiB distribution volume ratio. Results: Cortical amyloid burden was higher in the DLB group than in the PDD group, comparable to the AD group. Amyloid deposition in the PDD group was low, comparable to the PD and NC groups. Relative to global cortical retention, occipital PiB retention was lower in the AD group than in the other groups. For the DLB, PDD, and PD groups, amyloid deposition in the parietal (lateral and precuneus)/posterior cingulate region was related to visuospatial impairment. Striatal PiB retention in the DLB and PDD groups was associated with less impaired motor function. Conclusions: Global cortical amyloid burden is high in dementia with Lewy bodies (DLB) but low in Parkinson disease dementia. These data suggest that β-amyloid may contribute selectively to the cognitive impairment of DLB and may contribute to the timing of dementia relative to the motor signs of parkinsonism. GLOSSARY: AAL = Automated Anatomic Labeling; AD = Alzheimer disease; ADRC = Alzheimer’s Disease Research Center; AMNART = American version of the National Adult Reading Test; ANCOVA = analysis of covariance; BDS = Blessed Dementia Scale; CAA = cerebral amyloid angiopathy; CDR = Clinical Dementia Rating; CDR-SB = Clinical Dementia Rating Sum of Boxes; DLB = dementia with Lewy bodies; DVR = distribution volume ratio; FCSRT = Cued Selective Reminding Test; FRSRT = Free Selective Reminding Test; H&Y = Hoehn and Yahr; MGH = Massachusetts General Hospital; MMSE = Mini-Mental State Examination; NC = normal control; NFT = neurofibrillary tangle; NPIQ = Neuropsychiatric Inventory Questionnaire; NS = not significant; PD = Parkinson disease; PDD = Parkinson disease dementia; PiB = Pittsburgh Compound B; ROI = region of interest; SPM2 = Statistical Parametric Mapping; UKPDSBRC = UK Parkinson’s Disease Society Brain Bank Research Center; UPDRS = United Parkinson’s Disease Rating Scale; WAIS-R = Wechsler Adult Intelligence Scale–Revised.

Imaging amyloid deposition in Lewy body diseases

In this paper, a universal charge-controlled mem-elements (including memristor, memcapacitor, and meminductor) emulator consisting of off-the-shelf devices is proposed. With the unchanged topology of the circuit, the emulator can realize memristor, memcapacitor, and meminductor, respectively. The proposed emulation circuit has a simple mathematical relationship and is constructed with few active devices and passive components, which not only reduces the cost but also facilitates reproduction and facilitates future application research. The grounding and floating forms of the circuit are demonstrated, and Multisim circuit simulation and breadboard experiments validate the emulator's effectiveness. Furthermore, a universal mem-elements chaotic circuit is designed by using the proposed mem-elements emulator and other circuit elements, which is a deformation circuit of Chua's dual circuit. In this circuit, no matter whether the mem-element is memristor, memcapacitor, or meminductor, the chaotic circuit structure does not change, and all can generate hyper-chaos.

A universal emulator for memristor, memcapacitor, and meminductor and its chaotic circuit.

In this paper, new analog emulator circuits of flux-controlled memristor based on current voltage differencing transconductance amplifier (VDTA) and passive elements are proposed. They emulate both types of memductance, incremental and decremental, solely by interchanging the VDTA output terminals controlled by a simple switch. It uses only one VDTA, two resistors, one capacitor and one multiplier emulating floating memductance. Compared to other designed emulator circuits, they consist of fewer CMOS transistors and have wider output ranges. Theoretical derivations and related results are validated using SPICE simulations. The effectiveness of the proposed memristor circuits is verified by experimental results using commercially available integrated circuits, showing close agreement with theoretical and simulation results and easily reproducible at a low cost. The simulation test results and use of 0.18 μm CMOS technology have shown that the maximum frequency is 2 MHz. The circuit has also been tested for non-volatility features.The application of the proposed floating memristor emulator in designing an FM-to-AM converter confirms the functionality of the proposed circuit.

Floating incremental/decremental flux-controlled memristor emulator circuit based on single VDTA

Composite graphene-metal microstructures for enhanced multiband absorption covering the entire terahertz range

In this paper, memristor emulator circuit consisting of only seven MOS transistors and one grounded capacitor is presented. Memristors exhibit nonlinear voltage-current relationship and many previous emulator circuits have multiplier circuit to provide the nonlinear characteristic of the memristor. But there is no any multiplier circuit block in the proposed circuit so the proposed memristor circuit occupies low chip area. The memristor circuit is laid by using Cadence Environment with TSMC 0.18 µm process parameters and its layout dimensions are only 12 µm × 38 µm excluding the area of the capacitor. The post-layout simulation results for memristor are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner, and radical temperature changes. All post-layout simulations agree well with theoretical analyses. Besides the VLSI implementation of the memristor, the proposed circuit is built on the breadboard using discrete circuit elements.

A new grounded memristor emulator based on MOSFET-C

Single CCTA based high frequency floating and grounded type of incremental/decremental memristor emulator and its application

Memristor emulator based on TiO 2 model is introduced. The proposed circuit uses current mode building block DVCCTA (Differential Voltage Current Conveyor Transconductance Amplifier) using 0.25 µm CMOS technology. The presented circuit uses single CMOS based DVCCTA, three resistors and one capacitor. It can operate up to 1 MHz in both the incremental and decremental configuration by interchanging the connections. Theoretical analysis of the proposed circuit resulting in the equivalent memristance equation is done and non-ideal analysis is also included. PSPICE simulations are performed. Simulation results agree well with theoretical assumption. To verify the practicability of the circuit, PCB prototype has been made using AD844AN and CA3080. The experimental demonstration is carried out for 50 kHz and 100 kHz. Moreover, the circuit has also been tested for non-volatility features. It is observed from the experimental test result and using 0.25 µm CMOS technology that maximum frequency is 10 kHz and 50 kHz respectively. To check the functionality of the circuit two combinations of memristor are connected in serial and parallel and desired results are obtained. Memristor based high pass filter is also discussed so as to study the memristor behavior in comparison to the resistor.

Single DVCCTA based high frequency incremental/decremental memristor emulator and its application

A flux-controlled memristor emulator built with off-the-shelf electronic devices and based on a TiO2 model is presented in this article. The circuit proposed in this article uses the current mode approach based analog building blocks such as a second-generation current conveyor (CCII) and an operational transconductance amplifier (OTA) as an active element with few passive elements. The circuit shows a clear fingerprint of an ideal memristor. The offered emulator circuit can be made to operate in incremental and decremental modes and functions well up to 26.3 MHz. Nonvolatility, Monte Carlo sampling, and corner analysis simulations are executed to verify the robustness of the circuit. The functional verification of the presented circuit is performed using the 0.18- $\mu \text{m}$ CMOS parameter at a supply voltage of ±1.2 V. The experimental demonstration is carried out by making a prototype on a breadboard using ICs AD844AN and CA3080, which exhibits a good agreement with theoretical and simulation results. The layout of the circuit, which requires a total chip area of $75\times 70\,\,\mu \text{m}^{2}$ , is also created. Single/parallel combinations of a memristor, a high-pass filter, and a chaotic system are presented to demonstrate its application.

Flux-Controlled Memristor Emulator and Its Experimental Results

In this study, a high-frequency floating-type memristor emulator has been presented. The proposed emulator circuit uses a current conveyor transconductance amplifier, second generation current conveyor, three resistors and a grounded capacitor. The presented floating-type memristor can be configured in both incremental and decremental configurations and performs well up to 5 MHz. The equivalent memristor equation is verified by theoretical analysis of the proposed circuit which also includes non-ideal analysis. The theoretical proposition has been verified through personal simulation program with integrated circuit emphasis simulations using TSMC 0.25 μm complementary metal oxide semiconductor technology parameters. Moreover, non-volatility and Monte Carlo simulation have been performed to check the robustness of the circuit. The effectiveness of the presented memristor emulator design has been verified by printed circuit board prototype using commonly available integrated circuits AD844 and CA3080. The experimental results are included, which show good agreement with the theoretical and simulation results. To test the functionalities of the proposed designs, their applications as parallel and serial combinations, high-pass filter and Chua's oscillator have been presented.

https://ietresearch.onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2018.5191

High-frequency floating memristor emulator and its experimental results

This article proposes a charged controlled emulator model for memristor and memcapacitor using second-generation Current Conveyor (CCIIs) and Analog Multiplier (AM). The grounded and floating mem-element circuits have been designed using two CCIIs and one multiplier in addition to some passive components. The grounded type of design requires three resistors and three capacitors while floating design necessitates only two resistors and two capacitors. With the help of a switch, the proposed design can be easily switched into a memristor or memcapacitor. The proposed emulator model has been theoretically analyzed and simulated in PSpice to substantiate the effectiveness and accuracy. The practicability of the circuit has been established using commercially available ICs AD844AN and AD633JN. Non-linear characteristics of the proposed memristor emulator have been used to design a chaotic system.

/pdf/charged-controlled-mem-element-emulator-and-its-application-2tupf6ejaa.pdf

Rajeev Kumar Ranjan

Papers

Single CCTA based high frequency floating and grounded type of incremental/decremental memristor emulator and its application

Single DVCCTA based high frequency incremental/decremental memristor emulator and its application

Flux-Controlled Memristor Emulator and Its Experimental Results

High-frequency floating memristor emulator and its experimental results

Charged Controlled Mem-Element Emulator and Its Application in a Chaotic System