Showing papers by "Rakesh Malik published in 2010"
30 Dec 2010
TL;DR: System level model has been created for USB HSLINK taking into account the external parameters like board, package, measurement environment which influence the performance of the channel.
Abstract: Signal Integrity (SI) and Power Integrity (PI) are the most critical issues for higher operational speeds in semiconductor industry. This work identifies and optimizes the parameters of board, package and termination environment, influencing the signal integrity and power integrity of serial link. System level model has been created for USB HSLINK taking into account the external parameters like board, package, measurement environment which influence the performance of the channel. Parameters variations appearing from manufactura-bility constraints, material property constraints, design tolerance etc affecting the serial link performance has been optimized using Taguchi method based on statistical co-analysis. Using the Taguchi statistical techniques, sensitivity analysis on parameter variations affecting HSLINK performance is analyzed and optimized for desired performance.
7 citations