Other affiliations: Qualcomm, IBM, AVX Corporation ...read more
Bio: Rao Tummala is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topic(s): Interposer & Capacitor. The author has an hindex of 43, co-authored 623 publication(s) receiving 11663 citation(s). Previous affiliations of Rao Tummala include Qualcomm & IBM.
Topics: Interposer, Capacitor, Dielectric, Flip chip, Capacitance
Papers published on a yearly basis
•15 Dec 1996
01 Jan 2001
TL;DR: This chapter discussesfundamentals of Microsystems Design for the Environment, as well as the role of Packaging in Microelectronics, and how to design for Reliability.
Abstract: Chapter 1: Introduction to Microsystems Packaging. Chapter 2: The Role of Packaging in Microelectronics Chapter 3: The Role of Packaging in Microsystems. Chapter 4: Fundamentals of Electrical Package Design. Chapter 5: Fundamentals of Design for Reliability. Chapter 6: Fundamentals of Thermal Management. Chapter 7: Fundamentals of Single Chip Packaging. Chapter 8: Funamentals of Multichip Packaging. Chapter 9: Fundamentals of IC Assembly. Chapter 10: Fundamentals of Water-Level Packaging. Chapter 11: Fundamentals of Passives: Discrete, Integrated, and Embedded. Chapter 12: Fundamentals of Optoelectronics. Chapter 13: Fundamentals of RF Packaging. Chapter 14: Fundamentals of Microelectromechanical Systems. Chapter 15: Fundamentals of Sealing and Encapsulation. Chapter 16: Fundamentals of System-Level PWB Technologies. Chapter 17: Fundamentals of Board Assembly. Chapter 18: Fundamentals of Packaging Materials and Processes. Chapter 19: Fundamentals of Electrical Testing. Chapter 20: Fundamentals of Package Manufacturing. Chapter 21: Fundamentals of Microsystems Design for the Environment. Chapter 22: Fundamentals of Microsstems Reliability. Glossary.
TL;DR: In this paper, a broad overview of packaging involving interconnecting, powering, protecting, and cooling semiconductor chips to meet a variety of computer system needs is presented, both for high-performance and low-performance applications.
Abstract: A broad overview of packaging involving interconnecting, powering, protecting, and cooling semiconductor chips to meet a variety of computer system needs is presented. The general requirements for ceramics in terms of their thermal, mechanical, electrical, and dimensional control requirements are presented, both for high-performance and low-performance applications. Glass-ceramics are identified as the best candidates for high-performance systems, and aluminum nitride, alumina, or mullite are identified for low-performance systems. Glass-ceramic/copper substrate technology is discussed as an example of high-performance ceramic packaging for use in 1990s. Lower-dielectric-constant ceramics such as composites of silica, borosilicate, and cordierite, with or without polymers and porosity, are projected as potential ceramic substrate materials by the year 2000.
21 Jan 2006-Nano Letters
TL;DR: Rectifying diodes of single nanobelt/nanowire-based devices have been fabricated by aligning single ZnO nanobelts/ nanowires across paired Au electrodes using dielectrophoresis to form the Schottky diode.
Abstract: Rectifying diodes of single nanobelt/nanowire-based devices have been fabricated by aligning single ZnO nanobelts/nanowires across paired Au electrodes using dielectrophoresis. A current of 0.5 μA at 1.5 V forward bias has been received, and the diode can bear an applied voltage of up to 10 V. The ideality factor of the diode is ∼3, and the on-to-off current ratio is as high as 2000. The detailed IV characteristics of the Schottky diodes have been investigated at low temperatures. The formation of the Schottky diodes is suggested due to the asymmetric contacts formed in the dielectrophoresis aligning process.
TL;DR: The SOP package overcomes both the computing limitations and integration limitations of SOC, SIP, MCM, and traditional system packaging by having global wiring as well as RF, digital, and optical component integration in the package, not in the chip.
Abstract: In the past, microsystems packaging played two roles: 1) it provided I/O connections to and from integrated circuits (ICs) or wafer-level packaging (WLP), and 2) it interconnected both active and passive components on system level boards, referred to as systems packaging. Both were accomplished by interconnections or multilayer wiring at the package or board level. More recently, the IC devices have begun to integrate not only more and more transistors, but also active and passive components on an individual chip, leading the community to believe that someday there may be a single-chip complete system, referred to as system-on-chip (SOC). This can be called horizontal or two-dimensional (2-D) integration of IC blocks in a single-chip toward end-product systems. The community began to realize, however, that such an approach presents fundamental, engineering, and investment limits, as well as computing and communication limits for wireless and wired systems over the long run. This led to 3-D packaging approaches, often referred to as system-in-package (SIP). The SIP, while providing major opportunities in both miniaturization and integration for advanced and portable electronic products, is a subsystem, limited by the CMOS process just like the SOC. Some existing and emerging applications, however, include sensors, memory modules and embedded processors with DRAMs. More recent 3-D solutions, which incorporate stacked package approaches, offer solutions toward faster time-to-market and business impediments that have plagued MCM deployment for the past decade. There is a new emerging concept called system-on-package (SOP). With SOP, the package, not the board, is the system. As such, SOP is beginning to address the shortcomings of both SOC and SIP, as well as traditional packaging which is bulky, costly, and lower in performance and reliability than ICs, in two ways: 1) It uses CMOS-based silicon for what it is good for, namely, for transistor integration, and the package, for what it is good for, namely, RF, optical, and digital integration by means of IC-package-system codesign. The SOP package, therefore, overcomes both the computing limitations and integration limitations of SOC, SIP, MCM, and traditional system packaging. It does this by having global wiring as well as RF, digital, and optical component integration in the package, not in the chip. The SOP, therefore, includes both active and passive components in thin-film form, in contrast with indiscrete or thick-film form, including embedded digital, RF, and optical components, and functions in a microminiaturized package or board.
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …
01 Apr 2007-Materials Today
TL;DR: Shape-memory polymers as discussed by the authors are an emerging class of active polymers that can change their shape in a predefined way from shape A to shape B when exposed to an appropriate stimulus.
Abstract: Shape-memory polymers are an emerging class of active polymers that have dual-shape capability. They can change their shape in a predefined way from shape A to shape B when exposed to an appropriate stimulus. While shape B is given by the initial processing step, shape A is determined by applying a process called programming. We review fundamental aspects of the molecular design of suitable polymer architectures, tailored programming and recovery processes, and the quantification of the shape-memory effect. Shape-memory research was initially founded on the thermally induced dual-shape effect. This concept has been extended to other stimuli by either indirect thermal actuation or direct actuation by addressing stimuli-sensitive groups on the molecular level. Finally, polymers are introduced that can be multifunctional. Besides their dual-shape capability, these active materials are biofunctional or biodegradable. Potential applications for such materials as active medical devices are highlighted.
TL;DR: This work establishes a methodology for scavenging light-wind energy and body-movement energy using fabrics and presents a simple, low-cost approach that converts low-frequency vibration/friction energy into electricity using piezoelectric zinc oxide nanowires grown radially around textile fibres.
Abstract: Nanodevices don't use much energy, and if the little they do need can be scavenged from vibrations associated with foot steps, heart beats, noises and air flow, a whole range of applications in personal electronics, sensing and defence technologies opens up. Energy gathering of that type requires a technology that works at low frequency range (below 10 Hz), ideally based on soft, flexible materials. A group working at Georgia Institute of Technology has now come up with a system that converts low-frequency vibration/friction energy into electricity using piezoelectric zinc oxide nanowires grown radially around textile fibres. By entangling two fibres and brushing their associated nanowires together, mechanical energy is converted into electricity via a coupled piezoelectric-semiconductor process. This work shows a potential method for creating fabrics which scavenge energy from light winds and body movement. A self-powering nanosystem that harvests its operating energy from the environment is an attractive proposition for sensing, personal electronics and defence technologies1. This is in principle feasible for nanodevices owing to their extremely low power consumption2,3,4,5. Solar, thermal and mechanical (wind, friction, body movement) energies are common and may be scavenged from the environment, but the type of energy source to be chosen has to be decided on the basis of specific applications. Military sensing/surveillance node placement, for example, may involve difficult-to-reach locations, may need to be hidden, and may be in environments that are dusty, rainy, dark and/or in deep forest. In a moving vehicle or aeroplane, harvesting energy from a rotating tyre or wind blowing on the body is a possible choice to power wireless devices implanted in the surface of the vehicle. Nanowire nanogenerators built on hard substrates were demonstrated for harvesting local mechanical energy produced by high-frequency ultrasonic waves6,7. To harvest the energy from vibration or disturbance originating from footsteps, heartbeats, ambient noise and air flow, it is important to explore innovative technologies that work at low frequencies (such as <10 Hz) and that are based on flexible soft materials. Here we present a simple, low-cost approach that converts low-frequency vibration/friction energy into electricity using piezoelectric zinc oxide nanowires grown radially around textile fibres. By entangling two fibres and brushing the nanowires rooted on them with respect to each other, mechanical energy is converted into electricity owing to a coupled piezoelectric–semiconductor process8,9. This work establishes a methodology for scavenging light-wind energy and body-movement energy using fabrics.
20 Sep 2004
01 May 2010-Nature Nanotechnology
TL;DR: This work demonstrates the vertical and lateral integration of ZnO nanowires into arrays that are capable of producing sufficient power to operate real devices and uses the vertically integrated nanogenerator to power a nanowire pH sensor and a Nanowire UV sensor, thus demonstrating a self-powered system composed entirely of nanowiring.
Abstract: The lateral and vertical integration of ZnO piezoelectric nanowires allows for voltage and power outputs sufficient to power nanowire-based sensors.