R
Rao Tummala
Researcher at Georgia Institute of Technology
Publications - 628
Citations - 12781
Rao Tummala is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Interposer & Capacitor. The author has an hindex of 43, co-authored 623 publications receiving 11663 citations. Previous affiliations of Rao Tummala include Qualcomm & IBM.
Papers
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Proceedings ArticleDOI
New 3D chip stacking SIP technology by wire-on-bump (WOB) and bump-on-flex (BOF)
TL;DR: In this article, two new 3D chip stacking technologies, WOB (wire-on-bumps) and BOF (bump-onflex), are proposed and demonstrated with their prototypes.
Proceedings ArticleDOI
Overview of IBM glass ceramic packaging technology
TL;DR: In this article, the ES9000 glass-ceramic/copper substrate has been used for high-end machines including supercomputer applications and two technology alternatives are discussed in this paper, both aimed at achieving high density, yet they differ quite a bit in their applications.
Journal ArticleDOI
Co-Design and Demonstration of a Fully Integrated Optical Transceiver Package Featuring Optical, Electrical, and Thermal Interconnects in Glass Substrate
TL;DR: In this article, a glass package that emulates a 400 Gbps optical transceiver module was designed and demonstrated using a panel scalable process flow developed by the authors with shared steps.
Proceedings ArticleDOI
A novel non-solder based board-to-board interconnection technology for smart mobile and wearable electronics
TL;DR: In this article, the first demonstration of a novel concept for an ultra-high density and low-cost, non-solder based interconnection technology, which can be applied for miniaturized board-to-board (BTB) as well as 2nd level package-to system board interconnections, is reported.
Journal ArticleDOI
Demonstration of Embedded Cu Trench RDL using Panel Scale Lithography and Photosensitive Dry Film Polymer Dielectrics
Venky Sundaram,Fuhan Liu,Chandra Nair,Rao Tummala,Atsushi Kubo,Tomoyuki Ando,Keith Best,Corey Shay +7 more
TL;DR: In this paper, a fine pitch embedded trench RDL was demonstrated on glass substrates using a new family of ultra-high resolution dry film photo-sensitive polymer dielectrics and a new large area panel scale lithography tool.