R
Rao Tummala
Researcher at Georgia Institute of Technology
Publications - 628
Citations - 12781
Rao Tummala is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Interposer & Capacitor. The author has an hindex of 43, co-authored 623 publications receiving 11663 citations. Previous affiliations of Rao Tummala include Qualcomm & IBM.
Papers
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Proceedings ArticleDOI
Ultra-Precise Low-Cost Surface Planarization Process for Advanced Packaging Fabrications and Die Assembly: A Survey of Recent Investigations on Unit Process Applications and Integrations
TL;DR: In this article, a suite of highly precise surface planarization equipment and associated unit process have been developed for several years, achieving copper pillars height uniformity of less than 1.5um across entire 300mm Si low-k wafer area, and integrating with panel-based RDL fabrications based on either pohto-lithography method or by direct laser patterning methods in planarizing both patterned plating features and blanket overburden layer structure.
Proceedings ArticleDOI
Co-electrodeposited graphite and diamond-loaded solder nanocomposites as thermal interface materials
G. Prashant Reddy,P. Markondeya Raj,Nikhilesh Nataraj,P. M. Rajesh,Gopal C. Jha,Abhishek Choudhury,Nitesh Kumbhat,Rao Tummala,Nathaniel E. Brese,Michael P. Toben,Edit Szocs +10 more
TL;DR: In this paper, a novel co-electrodeposition process is described to form thin bonding structures based on soldergraphite and solder-diamond nanocomposites for thermal interface materials (TIM).
Patent
Underfill on substrate process and ultra-fine pitch, low standoff chip-to-package interconnections produced thereby
TL;DR: In this paper, the authors present methods and substrates suitable for flip-chip assembly using underfill materials with tailored properties along with a variety of patterning techniques to produce openings in underfill material disposed on the substrates.
Design, Modeling and Characterization of Embedded Capacitors for Decoupling Applications
Prathap Muthana,Ege Engin,Pulugurtha Markondeya Raj,Madhavan Swaminathan,Rao Tummala,Venkatesh Sundaram,Daniel I. Amey,Karl Hartmann Dietz,Sounak Banerji,Moises Cases +9 more
TL;DR: In this article, the effect of chip, package and board capacitors on the performance of digital systems is analyzed taking into account the parasiticeffects of power/ground planes, vias and solder balls.
Proceedings ArticleDOI
MEMS composite structures for tunable capacitors and IC-package nano interconnects
A.O. Aggarwal,Kianoush Naeli,Pulugurtha Markondeya Raj,Farrokh Ayazi,Swapan K. Bhattacharya,Rao Tummala +5 more
TL;DR: In this paper, a low-temperature process that combines high-aspect-ratio polymer structures with electroless copper plating to create laterally compliant MEMS structures is presented.