Rao Tummala

Bio: Rao Tummala is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Interposer & Capacitor. The author has an hindex of 43, co-authored 623 publications receiving 11663 citations. Previous affiliations of Rao Tummala include Qualcomm & IBM.

Processing, Properties and Electrical Reliability of Embedded Ultra-Thin Film Ceramic Capacitors in Organic Packages

Abstract: Traditional ceramic thick films have served the need for decoupling applications but require too high a temperature processing to be embedded in organic packages. Copper foil compatible sol-gel-derived ferroelectric thin film integration addresses this problem due to its unique advantages such as the ability to precisely control the composition of the films, large-area manufacturability using simple and inexpensive equipment and ease of introducing dopants to engineer the dielectric properties like loss tangent and DC leakage characteristics. This paper presents synthesis, fabrication, electrical characterization and electrical reliability test of embedded ultra thin film (200-300nm) capacitors with capacitance density >2muF/cm2, low-loss, low leakage current and high breakdown voltage via sol-gel technology & foil lamination. Further, we investigated the effect of (i) smoothness of the foil and (ii) non-stochiometery on the microstructure as well as on the electrical properties of sol-gel barium titanate thin films on bare copper foil. The capacitance densities, leakage characteristics and electrical reliability data demonstrate the suitability of this technology for future embedded decoupling capacitor applications.

Demonstration of Enhanced System-Level Reliability of Ultra-Thin BGA Packages with Circumferential Polymer Collars and Doped Solder Alloys

Abstract: The trend towards ultra-miniaturization, high interconnection densities with minimal power consumption at low cost is driving the need for large, thin, high-stiffness substrate technologies. Glass substrates have emerged as a promising alternative to organic and silicon interposer packages due to their tunable coefficient of thermal expansion (CTE), high dimensional stability and surface smoothness, outstanding electrical properties and low-cost panel-level processability. This paper presents a comprehensive study of the effect of glass CTE on board-level reliability of 100µm-thick glass ball grid array (BGA) packages, 18.5 mm x 18.5 mm in body size, with considerations of yield, warpage and thermal cycling performance. Polymer collars and novel doped solder alloys were also introduced to further enhance board-level reliability, and subsequently demonstrate the extendibility of direct SMT assembly of glass BGA packages to even larger body sizes. The test vehicle used in this study was an emulator of a single-chip application processor package. Daisy chain test dies, 10mm x 10mm in size and 100-200µm in thickness, were assembled onto the fabricated glass substrates with Si-matching CTE (3.8ppm/K) and board-matching CTE (9.8ppm/K) by dip-flux thermo-compression bonding with capillary underfill, at panel level. A stencil-based paste printing process was developed and optimized for panel-level balling of the glass packages with 250µm BGA at 400µm pitch. Variations in solder alloys were considered, including standard SAC105 and SAC305 used as reference, and the novel Mn-doped SACm by Indium Corporation. After singulation by laser dicing, the glass packages were finally mounted on mother boards by standard SMT reflow, after optimization of the heating profile to minimize solder voiding. Board-level yield was evaluated to 91%, and explained based on Shadow-Moire warpage measurements, showing a strong dependence to the chip-level underfill fillet size. Initial thermal cycling reliability was conducted on the glass BGA packages with and without polymer collars. All samples passed 600 cycles with stable daisy chain resistances, regardless of the glass CTE and solder alloy composition.

CoY hexaferrite-PEEK composites for integrated and miniaturized RF components

Abstract: CoY hexaferrite-filled PEEK (poly ethyl ether ketone) composites were synthesized to characterize the effect of hexaferrites on their dielectric, magnetic and thermal properties for wireless sensing and communication applications. Fillers were synthesized from solid-state reaction route and blended with the thermoplastic polymer matrix. XRD was used to study the phase purity of the synthesised fillers. Impedance measurement showed permeability of ~2 with a loss tangent of 0.04 and frequency stability of permeability up to 800 MHz for higher filler loading. Dielectric property measurements using parallel-plate capacitance showed that the composites can attain a maximum dielectric constant up to 8 and a loss tangent of 0.005. Thermo mechanical Analyser was used to characterize the coefficient of linear thermal expansion (CTE) of the composites. The measured CTE closely matches that of organic substrates and copper, resulting in minimal CTE mismatch issues during processing and operation. VSM studies revealed soft magnetic characteristics of the composites. The results suggest the potential of this polymer composite substrate for integrated RF modules with miniaturized embedded passive components.

Demonstration of ultra-thin tantalum capacitors on silicon substrates for high-frequency and high-efficiency power applications

Abstract: This paper describes an innovative scheme for integrating thinfilm tantalum (Ta) capacitors on active silicon substrates, an approach that can serve as a roadmap for the potential integration of ultra-thin high density capacitors in near future. The paper describes a new 3D concept for ultra-miniaturized, multi-functional and relatively low-cost power converter modules. The scheme consists of planar tantalum (Ta) capacitors by forming Ta 2 O 5 (30–120 nm thick) dielectric and attaching directly to active or passive Si substrates using ultra-loss dielectrics (Zeon, ZS-100). Capacitors attached directly on Si allow for shorter interconnection length ( 100 MHz) with fewer Ta capacitors on active Si. The paper focuses on capacitor fabrication of ultra-thin Ta foils (< 5µm) and their integration on ultra-thin active Si for lowering the parasitics. Consequently, electrical characterization of the above capacitors demonstrates the fundamental electrical superiority of the 3D integrated Ta capacitors.

Second level interconnect structures and methods of making the same

Abstract: The various embodiments of the present invention provide a stress-relieving, second- level interconnect structure that is low-cost and accommodates TCE mismatch between low-TCE packages and PCBs. The various embodiments of the interconnect structure are reworkable and can be scaled to pitches from about 1 millimeter (mm) to about 150 micrometers (μιη). The interconnect structure comprises at least a first pad, a supporting pillar, and a solder bump, wherein the first pad and supporting pillar are operative to absorb substantially all plastic strain, therefore enhancing compliance between the two electronic components. The versatility, scalability, and stress-relieving properties of the interconnect structure of the present invention make it a desirable structure to utilize in current two-dimensional and ever-evolving three- dimensional IC structures.

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

Microfibre–nanowire hybrid structure for energy scavenging

Abstract: Nanodevices don't use much energy, and if the little they do need can be scavenged from vibrations associated with foot steps, heart beats, noises and air flow, a whole range of applications in personal electronics, sensing and defence technologies opens up. Energy gathering of that type requires a technology that works at low frequency range (below 10 Hz), ideally based on soft, flexible materials. A group working at Georgia Institute of Technology has now come up with a system that converts low-frequency vibration/friction energy into electricity using piezoelectric zinc oxide nanowires grown radially around textile fibres. By entangling two fibres and brushing their associated nanowires together, mechanical energy is converted into electricity via a coupled piezoelectric-semiconductor process. This work shows a potential method for creating fabrics which scavenge energy from light winds and body movement. A self-powering nanosystem that harvests its operating energy from the environment is an attractive proposition for sensing, personal electronics and defence technologies1. This is in principle feasible for nanodevices owing to their extremely low power consumption2,3,4,5. Solar, thermal and mechanical (wind, friction, body movement) energies are common and may be scavenged from the environment, but the type of energy source to be chosen has to be decided on the basis of specific applications. Military sensing/surveillance node placement, for example, may involve difficult-to-reach locations, may need to be hidden, and may be in environments that are dusty, rainy, dark and/or in deep forest. In a moving vehicle or aeroplane, harvesting energy from a rotating tyre or wind blowing on the body is a possible choice to power wireless devices implanted in the surface of the vehicle. Nanowire nanogenerators built on hard substrates were demonstrated for harvesting local mechanical energy produced by high-frequency ultrasonic waves6,7. To harvest the energy from vibration or disturbance originating from footsteps, heartbeats, ambient noise and air flow, it is important to explore innovative technologies that work at low frequencies (such as <10 Hz) and that are based on flexible soft materials. Here we present a simple, low-cost approach that converts low-frequency vibration/friction energy into electricity using piezoelectric zinc oxide nanowires grown radially around textile fibres. By entangling two fibres and brushing the nanowires rooted on them with respect to each other, mechanical energy is converted into electricity owing to a coupled piezoelectric–semiconductor process8,9. This work establishes a methodology for scavenging light-wind energy and body-movement energy using fabrics.

Self-powered nanowire devices.

Abstract: The lateral and vertical integration of ZnO piezoelectric nanowires allows for voltage and power outputs sufficient to power nanowire-based sensors.