Raphael M. Brum

TL;DR: This work presents a complete RHBD flow methodology employing enclosed-layout transistors (ELTs) and guard rings, transparent to the designer, and fully compatible with commercial CAD tools and standard fabrication processes.

TL;DR: Experimental results show that both temperature and voltage scaling can increase in at least two times the susceptibility of SRAM cells to soft error rate (SER), and a model for electrical simulation for soft error and different voltages was described to investigate the effects observed in the practical neutron irradiation experiments.

TL;DR: This article assesses the vulnerability of a Kepler GPU to the transient effects through a neutron beam experiment, performs a fault injection campaign to identify the most critical registers, and uses the acquired data to improve the selective fault tolerance techniques in terms of occupation and performance.

TL;DR: It is claimed that the use of DVS increases the susceptibility of FinFET-based SRAM cells to soft errors under radiation effects and a methodology that allows determining the critical charge according to the dynamic behaviour of the temperature as a function of the voltage scaling is used.

TL;DR: The IEEE CASS Rio Grande do Sul Chapter as discussed by the authors organized webinars with talks from prominent speakers in the Circuits and Systems Society (CASS), which transformed local face-to-face seminars into a set of webinar accessible to hundreds of attendees from all around the globe.