Ratnadeep Pal

Bio: Ratnadeep Pal is an academic researcher from Indian Institutes of Technology. The author has contributed to research in topics: Current conveyor & Voltage-controlled filter. The author has an hindex of 2, co-authored 3 publications receiving 59 citations. Previous affiliations of Ratnadeep Pal include Indian Institute of Technology Dhanbad.

Generation of square and triangular wave with independently controllable frequency and amplitude using OTAs only and its application in PWM

Abstract: This paper presents a self-generating square/triangular wave generator using only the CMOS Operational Transconductance Amplifiers (OTAs) and a grounded capacitor. The output frequency and amplitude of the proposed circuit can be independently and electronically adjusted. The proposed circuit validates its advantage by consuming less amount of power, which is about 71.3 µW. The theoretical aspects are authentically showcased using the PSPICE simulation results. The performance of the proposed circuit is also verified through pre layout and post layout simulation results using the 90 nm GPDK CMOS parameters. A prototype of this circuit has been made using commercially available IC CA3080 for experimental verification. Experimentation also gives the similar output as per the theoretical proposition. The designed circuit is also made applicable to perform pulse width modulation (PWM).

Programmable and electronically tunable voltage-mode universal biquadratic filter based on simple CMOS OTA

Abstract: High-input impedance voltage-mode single input, single output (SISO) universal biquadartic filter with a new approach of programmability and electronic tunability is presented. The proposed filter is implemented by an operational transconductance amplifier (OTA), whose bias current can be externally controlled by control voltage (V CON ), that results in a more reliable circuit. The different types of filter functions (i.e. high pass, low pass, band pass, notch and all pass filters) can be implemented as well as its cutoff frequency and gain can be controlled by applying different control voltages (V CON ) to different OTAs, where a choice can be done digitally using microcontroller or microprocessor incorporating programmable compatibility to make it more user friendly. Moreover, this proposed filter enables easy cascading in voltage mode due to its high impedance input terminal. It uses grounded capacitors and requires no resistor, which is suitable for integrated circuit fabrication. Filter's performance parameters ω 0 and Q 0 can be set orthogonally by considering equal value of capacitors and transconductances g m1 and g m2 . No component matching condition is required. PSPICE result has been used to justify the performance of the circuit.

A universal emulator for memristor, memcapacitor, and meminductor and its chaotic circuit.

Abstract: In this paper, a universal charge-controlled mem-elements (including memristor, memcapacitor, and meminductor) emulator consisting of off-the-shelf devices is proposed. With the unchanged topology of the circuit, the emulator can realize memristor, memcapacitor, and meminductor, respectively. The proposed emulation circuit has a simple mathematical relationship and is constructed with few active devices and passive components, which not only reduces the cost but also facilitates reproduction and facilitates future application research. The grounding and floating forms of the circuit are demonstrated, and Multisim circuit simulation and breadboard experiments validate the emulator's effectiveness. Furthermore, a universal mem-elements chaotic circuit is designed by using the proposed mem-elements emulator and other circuit elements, which is a deformation circuit of Chua's dual circuit. In this circuit, no matter whether the mem-element is memristor, memcapacitor, or meminductor, the chaotic circuit structure does not change, and all can generate hyper-chaos.

Floating incremental/decremental flux-controlled memristor emulator circuit based on single VDTA

Abstract: In this paper, new analog emulator circuits of flux-controlled memristor based on current voltage differencing transconductance amplifier (VDTA) and passive elements are proposed. They emulate both types of memductance, incremental and decremental, solely by interchanging the VDTA output terminals controlled by a simple switch. It uses only one VDTA, two resistors, one capacitor and one multiplier emulating floating memductance. Compared to other designed emulator circuits, they consist of fewer CMOS transistors and have wider output ranges. Theoretical derivations and related results are validated using SPICE simulations. The effectiveness of the proposed memristor circuits is verified by experimental results using commercially available integrated circuits, showing close agreement with theoretical and simulation results and easily reproducible at a low cost. The simulation test results and use of 0.18 μm CMOS technology have shown that the maximum frequency is 2 MHz. The circuit has also been tested for non-volatility features.The application of the proposed floating memristor emulator in designing an FM-to-AM converter confirms the functionality of the proposed circuit.

A new grounded memristor emulator based on MOSFET-C

Abstract: In this paper, memristor emulator circuit consisting of only seven MOS transistors and one grounded capacitor is presented. Memristors exhibit nonlinear voltage-current relationship and many previous emulator circuits have multiplier circuit to provide the nonlinear characteristic of the memristor. But there is no any multiplier circuit block in the proposed circuit so the proposed memristor circuit occupies low chip area. The memristor circuit is laid by using Cadence Environment with TSMC 0.18 µm process parameters and its layout dimensions are only 12 µm × 38 µm excluding the area of the capacitor. The post-layout simulation results for memristor are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner, and radical temperature changes. All post-layout simulations agree well with theoretical analyses. Besides the VLSI implementation of the memristor, the proposed circuit is built on the breadboard using discrete circuit elements.

OTA based high frequency tunable resistorless grounded and floating memristor emulators

Abstract: In this paper, a new design has been proposed for the realization of grounded and floating memristor emulators built with two OTAs and one grounded capacitor. The proposed emulators can be configured in both incremental and decremental topology. This paper also proposes the application of memristor as Amplitude Modulator (AM). The proposed circuit and its application claim that the circuit is much simpler in design and can be utilized in both topologies. The performance of all the proposed circuits has been verified with Cadence Virtuoso Spectre. Furthermore, post-layout simulations and its comparison have been carried out. Moreover, experimentation of the circuits has also been performed and found satisfactory results.

A Simple Floating MOS-Memristor for High-Frequency Applications

Abstract: This research paper reports on a floating memristor model with minimum metal–oxide–semiconductor field-effect transistor count. The proposed structure uses only three nMOS transistors with a constant current bias and a single external capacitor. It offers less design complexity as compared to other existing memristor designs. The heart of the proposed design incorporates a MOS-based feedback circuit as an electronically controlled element for the memristance value. The memristor model has been integrated with 0.18- $\mu \text{m}$ Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) CMOS parameter. The pinched hysteresis loop of memristor for different frequency ranges and their composite characteristics are well analyzed using PSPICE simulation. The operating frequency range of the reported memristor is suitable up to few megahertz range. In addition to that application of the proposed MOS-memristor model is well described that comprises a Op-Amp-based Schmitt trigger circuit, a high-frequency modulation scheme, and an associative learning process. Finally, the postlayout simulation and experimental results are presented to validate the workability of the proposed memristor model.