Ravi Goel

TL;DR: In this article, a BSIM-based compact model for a high-voltage MOSFET is presented, which has been extended to include the overlap capacitance due to the drift region as well as quasi-saturation effect.

TL;DR: In this paper, an analytical model that accurately captures anomalous matching characteristics of drain current in a halo-implanted MOSFET across bias, geometry, and temperature is presented.

TL;DR: In this article, an improved physical equivalent circuit was derived using a transmission line model, by incorporating the high-frequency longitudinal gate electrode and a channel distributed RC network, which was implemented in a BSIM-BULK MOSFET model and validated with dc and RF data, obtained from technology computer aided design device simulations and experimental data.

TL;DR: An improved model of bulk charge effect for both drain current and capacitances and its implementation in the industry standard Berkeley short-channel IGFET model (BSIM)-BULK model is presented.

TL;DR: The recent and upcoming enhancements of the industry standard BSIM-BULK model are presented and an analytical model for bulk charge effect, in both current and capacitance, is implemented to improve the model accuracy for transconductance and output conductance.