Appearing in 1st IEEE International Workshop on Sensor Net Protocols and Applications (SNPA). Anchorage, Alaska, USA. May 11, 2003. RMST: Reliable Data Transport in Sensor Networks Fred Stann, John Heidemann Abstract – Reliable data transport in wireless sensor networks is a multifaceted problem influenced by the physical, MAC, network, and transport layers. Because sensor networks are subject to strict resource constraints and are deployed by single organizations, they encourage revisiting traditional layering and are less bound by standardized placement of services such as reliability. This paper presents analysis and experiments resulting in specific recommendations for implementing reliable data transport in sensor nets. To explore reliability at the transport layer, we present RMST (Reliable Multi- Segment Transport), a new transport layer for Directed Diffusion. RMST provides guaranteed delivery and fragmentation/reassembly for applications that require them. RMST is a selective NACK-based protocol that can be configured for in-network caching and repair. Second, these energy constraints, plus relatively low wireless bandwidths, make in-network processing both feasible and desirable [3]. Third, because nodes in sensor networks are usually collaborating towards a common task, rather than representing independent users, optimization of the shared network focuses on throughput rather than fairness. Finally, because sensor networks are often deployed by a single organization with inexpensive hardware, there is less need for interoperability with existing standards. For all of these reasons, sensor networks provide an environment that encourages rethinking the structure of traditional communications protocols. The main contribution is an evaluation of the placement of reliability for data transport at different levels of the protocol stack. We consider implementing reliability in the MAC, transport layer, application, and combinations of these. We conclude that reliability is important at the MAC layer and the transport layer. MAC-level reliability is important not just to provide hop-by-hop error recovery for the transport layer, but also because it is needed for route discovery and maintenance. (This conclusion differs from previous studies in reliability for sensor nets that did not simulate routing. [4]) Second, we have developed RMST (Reliable Multi-Segment Transport), a new transport layer, in order to understand the role of in- network processing for reliable data transfer. RMST benefits from diffusion routing, adding minimal additional control traffic. RMST guarantees delivery, even when multiple hops exhibit very high error rates. 1 Introduction Wireless sensor networks provide an economical, fully distributed, sensing and computing solution for environments where conventional networks are impractical. This paper explores the design decisions related to providing reliable data transport in sensor nets. The reliable data transport problem in sensor nets is multi-faceted. The emphasis on energy conservation in sensor nets implies that poor paths should not be artificially bolstered via mechanisms such as MAC layer ARQ during route discovery and path selection [1]. Path maintenance, on the other hand, benefits from well- engineered recovery either at the MAC layer or the transport layer, or both. Recovery should not be costly however, since many applications in sensor nets are impervious to occasional packet loss, relying on the regular delivery of coarse-grained event descriptions. Other applications require loss detection and repair. These aspects of reliable data transport include the provision of guaranteed delivery and fragmentation/ reassembly of data entities larger than the network MTU. Sensor networks have different constraints than traditional wired nets. First, energy constraints are paramount in sensor networks since nodes can often not be recharged, so any wasted energy shortens their useful lifetime [2]. This work was supported by DARPA under grant DABT63-99-1-0011 as part of the SCAADS project, and was also made possible in part due to support from Intel Corporation and Xerox Corporation. Fred Stann and John Heidemann are with USC/Information Sciences Institute, 4676 Admiralty Way, Marina Del Rey, CA, USA E-mail: fstann@usc.edu, johnh@isi.edu. 2 Architectural Choices There are a number of key areas to consider when engineering reliability for sensor nets. Many current sensor networks exhibit high loss rates compared to wired networks (2% to 30% to immediate neighbors)[1,5,6]. While error detection and correction at the physical layer are important, approaches at the MAC layer and higher adapt well to the very wide range of loss rates seen in sensor networks and are the focus of this paper. MAC layer protocols can ameliorate PHY layer unreliability, and transport layers can guarantee delivery. An important question for this paper is the trade off between implementation of reliability at the MAC layer (i.e. hop to hop) vs. the Transport layer, which has traditionally been concerned with end-to-end reliability. Because sensor net applications are distributed, we also considered implementing reliability at the application layer. Our goal is to minimize the cost of repair in terms of transmission.

RMST: Reliable Data Transport in Sensor Networks

Physical limitations for CMOS technology have provided the way for manufacturing the quantum cellular automata technology-based hardware elements at Nano level. From the purpose of very high speed, area and low power consumption, this Nanotechnology has been taken into consideration. Improving their structures will lead promoting the system performance completely, because the Full adders are assumed as major and primary component of computational processors. In current study, the new layout of all single bit full adders in the quantum cellular automata's technology is introduced. In comparison with existing schemes, the suggested circuit has fewer cells and smaller area.

A new quantum-dot cellular automata full-adder

Novel high-performance ternary circuits for nanotechnology are presented here. Each of these carbon nanotube field-effect transistor (CNFET)-based circuits implements all the possible kinds of ternary logic, including negative, positive and standard ternary logics, in one structure. The proposed designs have good driving capability and large noise margins and are robust. These circuits are designed based on the unique properties of CNFETs, such as the capability of setting the desired threshold voltage by changing the diameters of the nanotubes. This property of CNFETs makes them very suitable for the multiple- V t design method. The proposed circuits are simulated exhaustively, using Synopsys HSPICE with 32 nm-CNFET technology in various test situations and different supply voltages. Simulation results demonstrate great improvements in terms of speed, power consumption and insusceptibility to process variations with respect to other conventional and state-of-the-art 32 nm complementary metal-oxide semiconductor and CNFET-based ternary circuits. For instance at 0.9 V, the proposed ternary logic and arithmetic circuits consume on average 53 and 40 less energy, respectively, compared to the CNFET-based ternary logic and arithmetic circuits, recently proposed in the literature.

Design of energy-efficient and robust ternary circuits for nanotechnology

Congestion control mechanisms in wireless sensor networks

Designing efficient QCA logical circuits with power dissipation analysis

Science and Research Branch of IAU, Tehran, IranQuantum-dot Cellular Automata (QCA) is one of the most attractive technologies for computing atnano-scale. The principle logic element in QCA is majority gate. In this paper, a novel design for5-input majority gate is presented. A 5-input majority gate study has been proposed; however thisstudy has changed the scheme of basic QCA cells. The new proposed device reduces cell countsand area and uses conventional form of QCA cells. Accuracy of this design is proven by applyingsome simple physical substantiation and QCADesigner tool is used for verifying majority circuitlayout and functionality. Furthermore, a QCA Full-Adder is constructed using the new proposeddesign. Simulation results demonstrate that the proposed design of majority gates and Full-Adderresulted in signiﬁcant improvements in designing logical circuits.

Five-Input Majority Gate, a New Device for Quantum-Dot Cellular Automata

New Quantum Dot Cellular Automata Cell Arrangements

Design and characterization of a new fault-tolerant full-adder for quantum-dot cellular automata

A new fault-tolerant five-input majority gate for quantum-dot cellular automata (QCA) is presented. There has been considerable research on QCA as an emerging computing scheme in the nanoscale regimes. Two main logic elements for implementation with QCA are “Majority gate” and “Inverter”. In this paper, we propose a new approach to the design of fault-tolerant five-input majority gate by considering two-dimensional arrays of QCA cells. We analyze fault-tolerance properties of such block five-input majority gate with respect to misalignment, missing, and dislocation cells. In order to verify the functionality of the proposed component some physical proofs are provided. Our results clearly demonstrate the redundant version of the block five-input majority gate is more robust than the standard style for this gate and its usefulness in designing arithmetic circuits.

A new quantum-dot cellular automata fault-tolerant five-input majority gate

A novel fault-tolerant full-adder for quantum-dot cellular automata is presented. Quantum-dot cellular automata (QCA) is an emerging technology and a possible alternative for semiconductor transistor based technologies. A novel fault-tolerant full-adder is proposed in this paper: This component is suitable for designing fault-tolerant QCA circuits. The redundant version of full-adder is simple in structure and more robust than the standard style for this device. By considering two-dimensional arrays of QCA cells, fault tolerance properties of such block full-adder can be analyzed in terms of misalignment, missing and dislocation cells. In order to verify the functionality of the proposed device, some physical proofs are provided. The results confirm our claims and its usefulness in designing digital circuits.

Razieh Farazkish

Papers

Five-Input Majority Gate, a New Device for Quantum-Dot Cellular Automata

New Quantum Dot Cellular Automata Cell Arrangements

Design and characterization of a new fault-tolerant full-adder for quantum-dot cellular automata

A new quantum-dot cellular automata fault-tolerant five-input majority gate

A new quantum-dot cellular automata fault-tolerant full-adder